SLAS907C December   2015  – December 2020 HD3SS214

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings (1) (1)
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Electrical Characteristics, Device Parameters
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 High Speed Switching
      2. 7.3.2 HPD, AUX, and DDC Switching
      3. 7.3.3 Output Enable and Power Savings
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Dual GPU With Docking Station Support
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 DP Inputs
        2. 8.2.3.2 Source Selection Interface
      4. 8.2.4 DP++ Support
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
          1. 8.2.4.2.1 AUX and DDC Switching
          2. 8.2.4.2.2 CONFIG1 and CONFIG2 Routing
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Layer Stack
      2. 10.1.2 Differential Traces
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.1 Overview

The HD3SS214 is an analog, differential passive switch that can work for any high speed interface applications, as long as it is biased at a common mode voltage range of 0 V to 2 V and has differential signaling with differential amplitude up to 1800 mVpp.

Note:

HD3SS214 MUX does not provide common mode biasing for the channel. Therefore, it is required that the device is biased from either side for all active channels.

In high-speed applications and data paths, signal integrity is an important concern. The switch offers excellent dynamic performance such as high isolation, crosstalk immunity, and minimal bit-bit skew. These characteristics allow the device to function seamlessly in the system without compromising signal integrity. The 2:1/1:2, mux/de-mux device operates with ports A or B switched to port C, or port C switched to either port A or B. This flexibility allows an application to select between one of two Sources on ports A and B and send the output to the sink on port C. Similarly, a Source on port C can select between one of two Sink devices on ports A and B to send the data.

The HPD and data signals are both switched through the Dx_SEL pin. AUX and DDC are controlled with AUX_SEL and Dx_SEL.

With an OE control pin, the HD3SS214 is operational, with low active current, when this pin is high. When OE is pulled low, the device goes into standby mode and draws very little current in order to save power consumption in the application.

HD3SS214 high speed MUX channels have independent adaptive common mode tracking allowing four data paths to have different common mode voltage, simplifying system implementation and avoid inter-op issues.