SLASE74F May   2015  – September 2016 HD3SS3212

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 High-Speed Performance Parameters
    7. 7.7 Switching Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Output Enable and Power Savings
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Down Facing Port for USB3.1 Type C
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
    3. 10.3 Systems Examples
      1. 10.3.1 Up Facing Port for USB3.1 Type C
      2. 10.3.2 PCIE/SATA/USB
      3. 10.3.3 PCIE/eSATA
      4. 10.3.4 USB/eSATA
      5. 10.3.5 MIPI Camera Serial Interface
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RKS|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Power Supply Recommendations

The HD3SS3212 does not require a power supply sequence. However, TI recommends that OEn is asserted low after device supply VCC is stable and in specification. TI also recommends to place ample decoupling capacitors at the device VCC near the pin.