SBOS475K March   2009  – November 2023 INA210-Q1 , INA211-Q1 , INA212-Q1 , INA213-Q1 , INA214-Q1 , INA215-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Basic Connections
      2. 6.3.2 Selecting RS
    4. 6.4 Device Functional Modes
      1. 6.4.1 Input Filtering
      2. 6.4.2 Shutting Down the INA21x-Q1 Series
      3. 6.4.3 REF Input Impedance Effects
      4. 6.4.4 Using the INA21x-Q1 with Common-Mode Transients Above 26 V
      5. 6.4.5 Improving Transient Robustness
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Unidirectional Operation
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Bidirectional Operation
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curve
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Related Links
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4.5 Improving Transient Robustness

CAUTION:

Applications involving large input transients with excessive dV/dt above 2 kV per microsecond present at the device input pins can cause damage to the internal ESD structures on version A devices.

The potential damage from large input transients is a result of the internal latching of the ESD structure to ground when this transient occurs at the input. With significant current available in most current-sensing applications, the large current flowing through the input transient-triggered, ground-shorted ESD structure quickly results in damage to the silicon. External filtering can be used to attenuate the transient signal prior to reaching the inputs to avoid the latching condition. Care must be taken to ensure that external series input resistance does not significantly impact gain error accuracy. For accuracy purposes, keep these resistances under 10 Ω if possible. Ferrite beads are recommended for this filter because of the inherently low-dc ohmic value. Ferrite beads with less than 10 Ω of resistance at dc and over 600 Ω of resistance at 100 MHz to 200 MHz are recommended. The recommended capacitor values for this filter are between 0.01 µF and 0.1 µF to ensure adequate attenuation in the high-frequency region. Figure 6-7 illustrates this protection scheme.

GUID-5B939574-27F8-4658-BF6F-53EC9BD3D55D-low.gifFigure 6-7 Transient Protection

To minimize the cost of adding these external components to protect the device in applications where large transient signals may be present, version B and C devices are now available with new ESD structures that are not susceptible to this latching condition. Version B and C devices are incapable of sustaining these damage-causing latched conditions so they do not have the same sensitivity to the transients that the version A devices have, thus making the version B and C devices a better fit for these applications.