SBOS644D February   2013  – July 2022 INA231

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements: I2C Bus
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Basic Analog-to-Digital Converter (ADC) Functions
        1. 8.3.1.1 Power Calculation
        2. 8.3.1.2 ALERT Pin
    4. 8.4 Device Functional Modes
      1. 8.4.1 Averaging and Conversion Time Considerations
    5. 8.5 Programming
      1. 8.5.1 Configure, Measure, and Calculate Example
      2. 8.5.2 Programming the Power Measurement Engine
        1. 8.5.2.1 Calibration Register and Scaling
      3. 8.5.3 Simple Current Shunt Monitor Usage (No Programming Necessary)
      4. 8.5.4 Default INA231 Settings
      5. 8.5.5 Writing to and Reading from the INA231
        1. 8.5.5.1 Bus Overview
          1. 8.5.5.1.1 Serial Bus Address
          2. 8.5.5.1.2 Serial Interface
        2. 8.5.5.2 High-Speed I2C Mode
      6. 8.5.6 SMBus Alert Response
    6. 8.6 Register Maps
      1. 8.6.1 Configuration Register (00h, Read/Write)
        1. 8.6.1.1 AVG Bit Settings [11:9]
        2. 8.6.1.2 VBUS CT Bit Settings [8:6]
        3. 8.6.1.3 VSH CT Bit Settings [5:3]
        4. 8.6.1.4 Mode Settings [2:0]
      2. 8.6.2 Shunt Voltage Register (01h, Read-Only)
      3. 8.6.3 Bus Voltage Register (02h, Read-Only)
      4. 8.6.4 Power Register (03h, Read-Only)
      5. 8.6.5 Current Register (04h, Read-Only)
      6. 8.6.6 Calibration Register (05h, Read/Write)
      7. 8.6.7 Mask/Enable Register (06h, Read/Write)
      8. 8.6.8 Alert Limit Register (07h, Read/Write)
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Filtering and Input Considerations
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YFF|12
  • YFD|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

at TA = 25°C, VS = 3.3 V, VIN+ = 12 V, VSENSE = (VIN+ – VIN–) = 0 mV, and VBUS = 12 V (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
SHUNT INPUT
Shunt voltage input–81.9281.9175mV
CMRCommon-mode rejectionVIN+ = 0 V to 28 V100120dB
VOSShunt offset voltage, RTI(1)±10±50μV
TA = –40°C to +125°C0.10.5μV/°C
PSRRvs power supplyVS = 2.7 V to 5.5 V10μV/V
BUS INPUT
Bus voltage input range(2)028V
VOSBus offset voltage, RTI(1)±5±30mV
TA = –40°C to +125°C1040μV/°C
PSRRvs power supply2mV/V
BUS pin input impedance830kΩ
INPUT
IIN+, IIN-Input bias current10μA
Input leakage(3)(VIN+) + (VIN–), Power-Down mode0.10.5μA
DC ACCURACY
ADC native resolution16Bits
1 LSB step sizeShunt voltage2.5μV
Bus voltage1.25mV
Shunt voltage gain error0.2%0.5%
TA = –40°C to +125°C1050ppm/°C
Bus voltage gain error0.2%0.5%
TA = –40°C to +125°C1050ppm/°C
Differential nonlinearity±0.1LSB
ADC conversion timeCT bit = 000140154μs
CT bit = 001204224μs
CT bit = 010332365μs
CT bit = 011588646μs
CT bit = 1001.11.21ms
CT bit = 1012.1162.328ms
CT bit = 1104.1564.572ms
CT bit = 1118.2449.068ms
SMBus
SMBus timeout(4)2835ms
DIGITAL INPUT/OUTPUT
Input capacitance3pF
Leakage input current0 ≤ VIN ≤ VS0.52μA
VIHHigh-level input voltage1.46V
VILLow-level input voltage–0.50.4V
VOLLow-level output voltage (SDA, ALERT)IOL = 3 mA00.4V
Hysteresis500mV
POWER SUPPLY
Quiescent current330420μA
Power-Down mode37μA
Power-on reset threshold2V
(1) RTI = Referred-to-input.
(2) Although the input range is 28 V, the full-scale range of the ADC scaling is 40.96 V. Do not apply more than 28 V. See the Basic Analog-to-Digital Converter (ADC) Functions section for more details
(3) Input leakage is positive (current flowing into the pin) for the conditions shown at the top of this table. Negative leakage currents can occur under different input conditions.
(4) SMBus timeout in the INA231 resets the interface any time SCL is low for more than 28 ms.