SLLSEA5C March   2012  – March 2019 ISO7421E-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Simplified Schematic
  4. 4 Pin Configuration and Functions
    1. Table 1. Pin Functions
  5. 5 Electrostatic Discharge Caution
    1.     Device Images
      1. 5.1 Device Function Table
      2. 5.2 Available Options
  6. 6 Absolute Maximum Ratings
  7. 7 Thermal Information
  8. 8 Recommended Operating Conditions
  9. 9 Electrical Characteristics
  10. 10Switching Characteristics
  11. 11Electrical Characteristics
  12. 12Switching Characteristics
  13. 13Electrical Characteristics
  14. 14Switching Characteristics
  15. 15Electrical Characteristics
  16. 16Switching Characteristics
  17. 17Parameter Measurement Information
  18. 18Device Information
    1. 18.1 Package Characteristics
    2. 18.2 IEC 60664-1 Ratings Table
    3. 18.3 Insulation Characteristics
    4. 18.4 Regulatory Information
    5. 18.5 IEC Safety Limiting Values
    6. 18.6 Equivalent Input And Output Schematic Diagrams
  19. 19Typical Characteristics
  20. 20Revision History

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

14 Switching Characteristics

VCC1 at 3.3 V ± 5%, VCC2 at 5 V ± 5%, TA = –40°C to 125°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time See Figure 1 10 17 ns
PWD(1) Pulse width distortion |tPHL – tPLH| 0.5 4 ns
tsk(pp) Part-to-part skew time 8.5 ns
tsk(o) Channel-to-channel output skew time 4 ns
tr Output signal rise time See Figure 1 2 ns
tf Output signal fall time 2 ns
tfs Fail-safe output delay time from input power loss See Figure 2 6 µs
(1) Also known as pulse skew.