SLLSFO4C December   2022  – September 2023 ISOM8710 , ISOM8711

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics—DC 
    10. 7.10 Switching Characteristics, ISOM8710
    11. 7.11 Switching Characteristics, ISOM8711
    12. 7.12 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Sizing RIN
        2. 10.2.2.2 Driving the Input with a Buffer
        3. 10.2.2.3 Calculating RL for ISOM8711
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • DFF|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.4.1 Layout Guidelines

  • Bypass the VCC pin to ground with a low-ESR ceramic bypass capacitor. The typical recommended bypass capacitance is 0.1 μF when using a ceramic capacitor with an X5R- or X7R-rated dielectric. The capacitor should be placed as close to the VCC pin as possible in the PCB layout and on the same layer. The capacitor must have a voltage rating greater than the VCC voltage level.

  • The device connections to ground should be tied to the PCB ground plane using a direct connection or two vias to help minimize inductance.

  • The connections of capacitors and other components to the PCB ground plane should use a direct connection or two vias for minimum inductance.