SLLSFO4C December   2022  – September 2023 ISOM8710 , ISOM8711

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics—DC 
    10. 7.10 Switching Characteristics, ISOM8710
    11. 7.11 Switching Characteristics, ISOM8711
    12. 7.12 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Sizing RIN
        2. 10.2.2.2 Driving the Input with a Buffer
        3. 10.2.2.3 Calculating RL for ISOM8711
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • DFF|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.6 Insulation Specifications

PARAMETER TEST CONDITIONS VALUE UNIT
5-DFF
IEC 60664-1
CLR External clearance(1) Side 1 to side 2 distance through air >5 mm
CPG External creepage(1) Side 1 to side 2 distance across package surface >5 mm
DTI Distance through the insulation Minimum internal gap (internal clearance) >17 µm
CTI Comparative tracking index IEC 60112; UL 746A >400 V
Material Group According to IEC 60664-1 II
Overvoltage category per IEC 60664-1 Rated mains voltage ≤ 150 VRMS I-IV
Rated mains voltage ≤ 300 VRMS I-IV
Rated mains voltage ≤ 600 VRMS I-III
DIN EN IEC 60747-17 (VDE 0884-17)(2)
VIORM Maximum repetitive peak isolation voltage AC voltage (bipolar) 707 VPK
VIOWM Maximum isolation working voltage AC voltage (sine wave); time-dependent dielectric breakdown (TDDB) test 500 VRMS
DC voltage 707 VDC
VIOTM Maximum transient isolation voltage VTEST = VIOTM, t = 60 s (qualification); VTEST = 1.2 × VIOTM, t = 1 s (100% production) 5303 VPK
VIMP Maximum impulse voltage(3) Tested in air, 1.2/50-us waveform per IEC 62368-1 7200 VPK
VIOSM Maximum surge isolation voltage(4) VIOSM ≥ 1.3 x VIMP; tested in oil (qualification test), 1.2/50-μs waveform per IEC 62368-1 10000 VPK
qpd Apparent charge(5) Method a: After I/O safety test subgroup 2/3, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.2 × VIORM , tm = 10 s ≤5 pC
Method a: After environmental tests subgroup 1, Vini = VIOTM, tini = 60 s;
Vpd(m) = 1.6 × VIORM , tm = 10 s		 ≤5
Method b: At routine test (100% production) and preconditioning (type test), Vini = 1.2 × VIOTM, tini = 1 s;
Vpd(m) = 1.875 × VIORM , tm = 1 s (method b1) or Vpd(m) = Vini, tm = tini (method b3)		 ≤5
CIO Barrier capacitance, input to output(6) VIO = 0.4 × sin (2 πft), f = 1 MHz 1 pF
RIO Insulation resistance, input to output(6) VIO = 500 V, TA = 25°C >1012 Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C >1011
VIO = 500 V at TS = 150°C >109
Pollution degree 2
Climatic category 40/125/21
UL 1577
VISO Withstand isolation voltage VTEST = VISO, t = 60 s (qualification); VTEST = 1.2 × VISO, t = 1 s (100% production) 3750 VRMS
(1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care must be taken during board design so that the mounting pads of the isolator on the printed-circuit board (PCB) do not reduce creepage and clearance. Inserting grooves, ribs or both can help increase creepage distance on the PCB.
(2) This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
(3) Testing is carried out in air to determine the surge immunity of the package.
(4) Testing is carried out in oil to determine the intrinsic surge immunity of the isolation barrier.
(5) Apparent charge is electrical discharge caused by a partial discharge (pd).
(6) All pins on each side of the barrier tied together creating a two-pin device.