SNVS778E May   1999  – January 2016 LM137 , LM337-N

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Thermal Regulation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Protection Diodes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Adjustable Negative Voltage Regulator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Adjustable Lab Voltage Regulator
      3. 8.2.3 Current Regulator
      4. 8.2.4 −5.2-V Regulator with Electronic Shutdown
      5. 8.2.5 High Stability −10-V Regulator
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Heatsinking SOT-223 Package Parts
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

Some layout guidelines must be followed to ensure proper regulation of the output voltage with minimum noise. Traces carrying the load current must be wide to reduce the amount of parasitic trace inductance and the feedback loop from VOUT to ADJ must be kept as short as possible. To improve PSRR, a bypass capacitor can be placed at the ADJ pin and must be placed as close as possible to the IC. In cases when VIN shorts to ground, an external diode must be placed from VIN to VOUT to divert the surge current into the output capacitor and protect the IC. Similarly, in cases when a large bypass capacitor is placed at the ADJ pin and VOUT shorts to ground, an external diode must be placed from VOUT to ADJ to provide a path for the bypass capacitor to discharge. These diodes must be placed close to the corresponding IC pins to increase their effectiveness.

10.2 Layout Example

LM137 LM337-N lm337-n-layout-example.png Figure 18. Layout Example (SOT-223)

10.3 Thermal Considerations

10.3.1 Heatsinking SOT-223 Package Parts

The SOT-223 DCY packages use a copper plane on the PCB and the PCB itself as a heatsink. To optimize the heat sinking ability of the plane and PCB, solder the tab of the package to the plane.

Figure 19 and Figure 20 show the information for the SOT-223 package. Figure 20 assumes a θ(J−A) of 75°C/W for 1 ounce copper and 51°C/W for 2 ounce copper and a maximum junction temperature of 125°C.

LM137 LM337-N 00906732.png Figure 19. θ(J−A) vs Copper (2 ounce) Area for the SOT-223 Package
LM137 LM337-N 00906733.png Figure 20. Maximum Power Dissipation vs TAMB for the SOT-223 Package

See AN-1028, SNVA036, for power enhancement techniques to be used with the SOT-223 package.