SNVS124G November   1999  – March 2023 LM2596

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics – 3.3-V Version
    6. 7.6  Electrical Characteristics – 5-V Version
    7. 7.7  Electrical Characteristics – 12-V Version
    8. 7.8  Electrical Characteristics – Adjustable Voltage Version
    9. 7.9  Electrical Characteristics – All Output Voltage Versions
    10. 7.10 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Delayed Start-Up
      2. 8.3.2 Undervoltage Lockout
      3. 8.3.3 Inverting Regulator
      4. 8.3.4 Inverting Regulator Shutdown Methods
    4. 8.4 Device Functional Modes
      1. 8.4.1 Discontinuous Mode Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Capacitor (CIN)
      2. 9.1.2 Feedforward Capacitor (CFF)
      3. 9.1.3 Output Capacitor (COUT)
      4. 9.1.4 Catch Diode
      5. 9.1.5 Inductor Selection
      6. 9.1.6 Output Voltage Ripple and Transients
      7. 9.1.7 Open-Core Inductors
    2. 9.2 Typical Applications
      1. 9.2.1 LM2596 Fixed Output Series Buck Regulator
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Custom Design with WEBENCH® Tools
          2. 9.2.1.2.2 Inductor Selection (L1)
          3. 9.2.1.2.3 Output Capacitor Selection (COUT)
          4. 9.2.1.2.4 Catch Diode Selection (D1)
          5. 9.2.1.2.5 Input Capacitor (CIN)
        3. 9.2.1.3 Application Curves
      2. 9.2.2 LM2596 Adjustable Output Series Buck Regulator
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Programming Output Voltage
          2. 9.2.2.2.2 Inductor Selection (L1)
          3. 9.2.2.2.3 Output Capacitor Selection (COUT)
          4. 9.2.2.2.4 Feedforward Capacitor (CFF)
          5. 9.2.2.2.5 Catch Diode Selection (D1)
          6. 9.2.2.2.6 Input Capacitor (CIN)
        3. 9.2.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Examples
      3. 9.4.3 Thermal Considerations
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design with WEBENCH® Tools
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • NDH|5
  • NEB|5
  • KTT|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.9 Electrical Characteristics – All Output Voltage Versions

Specifications are for TJ = 25°C, ILOAD = 500 mA, VIN = 12 V for the 3.3-V, 5-V, and adjustable version, and VIN = 24 V for the 12-V version (unless otherwise noted).
PARAMETERTEST CONDITIONSMIN(1)TYP(2)MAX(1)UNIT
DEVICE PARAMETERS
IbFeedback bias currentAdjustable version only,
VFB = 1.3 V		TJ = 25°C1050nA
–40°C ≤ TJ ≤ 125°C100
fOOscillator frequency(3)TJ = 25°C127150173kHz
–40°C ≤ TJ ≤ 125°C110173
VSATSaturation voltage(4) (5)IOUT = 3 ATJ = 25°C1.161.4V
–40°C ≤ TJ ≤ 125°C1.5
DCMax duty cycle (ON)(5)100%
Min duty cycle (OFF)(6)0%
ICLCurrent limit(4) (5)Peak currentTJ = 25°C3.64.56.9A
–40°C ≤ TJ ≤ 125°C3.47.5
ILOutput leakage current(4) (6)Output = 0 V, VIN = 40 V50μA
Output = –1 V230mA
IQOperating quiescent current(6)See (6)510mA
ISTBYCurrent standby quiescentON/OFF pin = 5 V (OFF)(7)TJ = 25°C80200μA
–40°C ≤ TJ ≤ 125°C250μA
SHUTDOWN/SOFT-START CONTROL (see Figure 9-13 for test circuit)
VIHON/OFF pin logic input threshold voltageLow (regulator ON)TJ = 25°C1.3V
–40°C ≤ TJ ≤ 125°C0.6
VILHigh (regulator OFF)TJ = 25°C1.3V
–40°C ≤ TJ ≤ 125°C2
IHON/OFF pin input currentVLOGIC = 2.5 V (regulator OFF)515μA
ILVLOGIC = 0.5 V (regulator ON)0.025μA
(1) All room temperature limits are 100% production tested. All limits at temperature extremes are specified via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) The switching frequency is reduced when the second stage current limit is activated. The amount of reduction is determined by the severity of current overload.
(4) No diode, inductor, or capacitor connected to output pin.
(5) Feedback pin removed from output and connected to 0 V to force the output transistor switch ON.
(6) Feedback pin removed from output and connected to 12 V for the 3.3-V, 5-V, and the adjustable versions, and 15 V for the 12-V version, to force the output transistor switch OFF.
(7) VIN = 40 V.