Table 1. Design Parameters

8.2.1.2.1 Inductor Selection

The Duty Cycle (D) can be approximated quickly using the ratio of output voltage (V_O) to input voltage (V_IN) as shown in Equation 13.

Equation 13.

The catch diode (D1) forward voltage drop and the voltage drop across the internal NMOS must be included to calculate a more accurate duty cycle. Calculate D with Equation 14.

Equation 14.

V_SW can be approximated by Equation 15.

The diode forward drop (V_D) can range from 0.3 V to 0.7 V depending on the quality of the diode. The lower V_D is, the higher the operating efficiency of the converter.

The inductor value determines the output ripple current. Lower inductor values decrease the size of the inductor, but increase the output ripple current. An increase in the inductor value decreases the output ripple current. The ratio of ripple current (Δi_L) to output current (I_O) is optimized when it is set between 0.3 and 0.4 at 1 A. The ratio r is defined in Equation 16.

Equation 16.

One must also ensure that the minimum current limit (1.2 A) is not exceeded, so the peak current in the inductor must be calculated. The peak current (I_LPK) in the inductor is calculated by Equation 17.

If r = 0.5 at an output of 1 A, the peak current in the inductor is 1.25 A. The minimum specified current limit over all operating conditions is 1.2 A. One can either reduce r to 0.4 resulting in a 1.2-A peak current, or make the engineering judgement that 50 mA over is safe enough with a 1.7-A typical current limit and 6 sigma limits. When the designed maximum output current is reduced, the ratio r can be increased. At a current of 0.1 A, r can be made as high as 0.9. The ripple ratio can be increased at lighter loads because the net ripple is actually quite low, and if r remains constant the inductor value can be made quite large. An equation empirically developed for the maximum ripple ratio at any current below 2 A is:

The LM2734Z operates at frequencies allowing the use of ceramic output capacitors without compromising transient response. Ceramic capacitors allow higher inductor ripple without significantly increasing output ripple. See the Output Capacitor section for more details on calculating output voltage ripple.

Now that the ripple current or ripple ratio is determined, the inductance is calculated by Equation 19.

Equation 19.

where

• f_s is the switching frequency
• I_O is the output current

When selecting an inductor, make sure that it is capable of supporting the peak output current without saturating. Inductor saturation results in a sudden reduction in inductance and prevent the regulator from operating correctly. Because of the speed of the internal current limit, the peak current of the inductor need only be specified for the required maximum output current. For example, if the designed maximum output current is 0.5 A and the peak current is 0.7 A, then the inductor must be specified with a saturation current limit of >0.7 A. There is no need to specify the saturation or peak current of the inductor at the 1.7-A typical switch current limit. The difference in inductor size is a factor of 5. Because of the operating frequency of the LM2734Z, ferrite based inductors are preferred to minimize core losses. This presents little restriction because the variety of ferrite based inductors is huge. Lastly, inductors with lower series resistance (DCR) provides better operating efficiency. For recommended inductors, see the design examples in Typical Applications.

8.2.1.2.2 Input Capacitor

An input capacitor is necessary to ensure that V_IN does not drop excessively during switching transients. The primary specifications of the input capacitor are capacitance, voltage, RMS current rating, and ESL (Equivalent Series Inductance). The recommended input capacitance is 10 µF, although 4.7 µF works well for input voltages below 6 V. The input voltage rating is specifically stated by the capacitor manufacturer. Make sure to check any recommended deratings and also verify if there is any significant change in capacitance at the operating input voltage and the operating temperature. The input capacitor maximum RMS input current rating (I_RMS-IN) must be greater than:

Equation 20.

As seen in Equation 20, the maximum RMS capacitor current occurs when D = 0.5. Always calculate the RMS at the point where the duty cycle, D, is closest to 0.5. The ESL of an input capacitor is usually determined by the effective cross sectional area of the current path. A large leaded capacitor has high ESL and a 0805 ceramic chip capacitor has very low ESL. At the operating frequencies of the LM2734Z, certain capacitors may have an ESL so large that the resulting impedance (2πfL) is higher than that required to provide stable operation. As a result, surface mount capacitors are strongly recommended. Sanyo POSCAP, Tantalum or Niobium, Panasonic SP or Cornell Dubilier ESR, and multilayer ceramic capacitors (MLCC) are all good choices for both input and output capacitors and have very low ESL. For MLCCs, TI recommends using X7R or X5R dielectrics. Consult capacitor manufacturer data sheet to see how rated capacitance varies over operating conditions.

8.2.1.2.3 Output Capacitor

The output capacitor is selected based upon the desired output ripple and transient response. The initial current of a load transient is provided mainly by the output capacitor. The output ripple of the converter is shown in Equation 21.

Equation 21.

When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the output ripple is approximately sinusoidal and 90° phase shifted from the switching action. Given the availability and quality of MLCCs and the expected output voltage of designs using the LM2734Z, there is really no need to review any other capacitor technologies. Another benefit of ceramic capacitors is their ability to bypass high frequency noise. A certain amount of switching edge noise couples through parasitic capacitances in the inductor to the output. A ceramic capacitor bypasses this noise while a tantalum will not. Because the output capacitor is one of the two external components that control the stability of the regulator control loop, most applications will require a minimum at 10 µF of output capacitance. Capacitance can be increased significantly with little detriment to the regulator stability. Like the input capacitor, recommended multilayer ceramic capacitors are X7R or X5R. Again, verify actual capacitance at the desired operating voltage and temperature.

Check the RMS current rating of the capacitor. The RMS current rating of the capacitor chosen must also meet Equation 22.

Equation 22.

8.2.1.2.4 Catch Diode

The catch diode (D1) conducts during the switch OFF-time. A Schottky diode is recommended for its fast switching times and low forward voltage drop. The catch diode must be chosen so that its current rating is greater than Equation 23.

The reverse breakdown rating of the diode must be at least the maximum input voltage plus appropriate margin. To improve efficiency choose a Schottky diode with a low forward voltage drop.

8.2.1.2.5 Boost Diode

A standard diode such as the 1N4148 type is recommended. For V_BOOST circuits derived from voltages less than 3.3 V, a small-signal Schottky diode is recommended for greater efficiency. A good choice is the BAT54 small signal diode.

8.2.1.2.6 Boost Capacitor

A ceramic 0.01-µF capacitor with a voltage rating of at least 6.3 V is sufficient. The X7R and X5R MLCCs provide the best performance.

8.2.1.2.7 Output Voltage

The output voltage is set using Equation 24 where R2 is connected between the FB pin and GND, and R1 is connected between V_O and the FB pin. A good value for R2 is 10 kΩ.

Equation 24.

8.2.1.2.8 Calculating Efficiency, and Junction Temperature

The complete LM2734Z DC–DC converter efficiency can be calculated in the following manner:

Equation 25.

Or

Equation 26.

Calculations for determining the most significant power losses are shown below. Other losses totaling less than 2% are not discussed.

Power loss (P_LOSS) is the sum of two basic types of losses in the converter, switching and conduction. Conduction losses usually dominate at higher output loads, where as switching losses remain relatively fixed and dominate at lower output loads. The first step in determining the losses is to calculate the duty cycle (D).

Equation 27.

V_SW is the voltage drop across the internal NFET when it is on, and is equal to Equation 28.

V_D is the forward voltage drop across the Schottky diode. It can be obtained from the Electrical Characteristics section. If the voltage drop across the inductor (V_DCR) is accounted for, use Equation 29 to calculate the duty cycle.

Equation 29.

This usually gives only a minor duty cycle change, and has been omitted in the examples for simplicity.

The conduction losses in the free-wheeling Schottky diode are calculated using Equation 30.

Often this is the single most significant power loss in the circuit. Take care choosing a Schottky diode that has a low forward voltage drop.

Another significant external power loss is the conduction loss in the output inductor. The equation can be simplified to Equation 31.

The LM2734Z conduction loss is mainly associated with the internal NFET, as shown in Equation 32.

Switching losses are also associated with the internal NFET. They occur during the switch on and off transition periods, where voltages and currents overlap resulting in power loss. The simplest means to determine this loss is to empirically measure the rise and fall times (10% to 90%) of the switch at the switch node using Equation 33 through Equation 35.

Another loss is the power required for operation of the internal circuitry:

I_Q is the quiescent operating current, and is typically around 1.5 mA. The other operating power that needs to be calculated is that required to drive the internal NFET:

V_BOOST is normally between 3 VDC and 5 VDC. The I_BOOST rms current is approximately 4.25 mA. Total power losses are:

Equation 38.

8.2.1.2.9 Calculating the LM2734Z Junction Temperature

Thermal Definitions:

T_J = Chip junction temperature

T_A = Ambient temperature

R_θJC = Thermal resistance from chip junction to device case

R_θJA = Thermal resistance from chip junction to ambient air

Figure 12. Cross-Sectional View of Integrated Circuit Mounted on a Printed Circuit Board

Heat in the LM2734Z due to internal power dissipation is removed through conduction and/or convection.

Conduction: Heat transfer occurs through cross sectional areas of material. Depending on the material, the transfer of heat can be considered to have poor to good thermal conductivity properties (insulator vs conductor).

Heat Transfer goes as:

silicon→package→lead frame→PCB.

Convection: Heat transfer is by means of airflow. This could be from a fan or natural convection. Natural convection occurs when air currents rise from the hot device to cooler air.

Thermal impedance is defined as shown in Equation 39.

Equation 39.

Thermal impedance from the silicon junction to the ambient air is defined as shown in Equation 40.

Equation 40.

This impedance can vary depending on the thermal properties of the PCB. This includes PCB size, weight of copper used to route traces and ground plane, and number of layers within the PCB. The type and number of thermal vias can also make a large difference in the thermal impedance. Thermal vias are necessary in most applications. They conduct heat from the surface of the PCB to the ground plane. Four to six thermal vias must be placed under the exposed pad to the ground plane if the WSON package is used. If the 6-pin SOT package is used, place two to four thermal vias close to the ground pin of the device.

The data sheet specifies two different R_θJA numbers for the thin SOT–6 package. The two numbers show the difference in thermal impedance for a four-layer board with 2-oz. copper traces, versus a four-layer board with 1-oz. copper. R_θJA equals 120°C/W for 2-oz. copper traces and GND plane, and 235°C/W for 1-oz. copper traces and GND plane.

The first method to accurately measure the silicon temperature for a given application, two methods can be used. The first method requires the user to know the thermal impedance of the silicon junction to case. (R_θJC) is approximately 80°C/W for the thin SOT-6 package. Knowing the internal dissipation from the efficiency calculation given previously, and the case temperature, which can be empirically measured on the bench:

Equation 41.

Therefore:

Equation 43.

The second method can give a very accurate silicon junction temperature. The first step is to determine R_θJA of the application. The LM2734Z has overtemperature protection circuitry. When the silicon temperature reaches 165°C, the device stops switching. The protection circuitry has a hysteresis of 15°C. Once the silicon temperature has decreased to approximately 150°C, the device starts to switch again. Knowing this, the R_θJA for any PCB can be characterized during the early stages of the design by raising the ambient temperature in the given application until the circuit enters thermal shutdown. If the SW-pin is monitored, it is obvious when the internal NFET stops switching indicating a junction temperature of 165°C. Knowing the internal power dissipation from the above methods, the junction temperature and the ambient temperature, R_θJA can be determined using Equation 44.

Equation 44.

Once this is determined, the maximum ambient temperature allowed for a desired junction temperature can be found using Equation 45.

Equation 45.

Using a standard Texas Instruments 6-pin SOT demonstration board to determine the R_θJA of the board. The four layer PCB is constructed using FR4 with 1/2-oz copper traces. The copper ground plane is on the bottom layer. The ground plane is accessed by two vias. The board measures 2.5 cm × 3 cm. It was placed in an oven with no forced airflow.

The ambient temperature was raised to 94°C, and at that temperature, the device went into thermal shutdown.

Equation 46.

If the junction temperature was to be kept below 125°C, then the ambient temperature cannot go above 54.2°C.

Equation 47. T_J - (R_θJA × P_LOSS) = T_A

The method described above to find the junction temperature in the thin 6-pin SOT package can also be used to calculate the junction temperature in the WSON package. The 6-pin WSON package has a R_θJC = 20°C/W, and R_θJA can vary depending on the application. R_θJA can be calculated in the same manner as described in method 2 (see LM2734Z Design Example 3).

8.2.1.2.10 WSON Package

The LM2734Z is packaged in a thin, 6-pin SOT package and the 6-pin WSON. The WSON package has the same footprint as the thin, 6-pin SOT, but is thermally superior due to the exposed ground paddle on the bottom of the package.

Figure 13. No Pullback WSON Configuration

R_θJA of the WSON package is normally two to three times better than that of the thin, 6-pin SOT package for a similar PCB configuration (area, copper weight, thermal vias).

Figure 14. Dog Bone

For certain high power applications, the PCB land may be modified to a dog bone shape (see Figure 14). By increasing the size of ground plane, and adding thermal vias, the R_θJA for the application can be reduced.

Equation 48.

This example follows LM2734Z Design Example 2, but uses the WSON package. Using a standard Texas Instruments 6-pin WSON demonstration board, use Method 2 to determine R_θJA of the board. The four-layer PCB is constructed using FR4 with 1- or 2-oz copper traces. The copper ground plane is on the bottom layer. The ground plane is accessed by four vias. The board measures 2.5 cm × 3 cm. It was placed in an oven with no forced airflow.

The ambient temperature was raised to 113°C, and at that temperature, the device went into thermal shutdown.

Equation 49.

If the junction temperature is to be kept below 125°C, then the ambient temperature cannot go above 73.2°C.

Equation 50. T_J - (R_θJA × P_LOSS) = T_A

8.2.1.2.11 Package Selection

To determine which package you must use for your specific application, variables must be known before determining the appropriate package to use.

1. Maximum ambient system temperature
2. Internal LM2734Z power losses
3. Maximum junction temperature desired
4. R_θJA of the specific application, or R_θJC (WSON or 6-pin SOT)

The junction temperature must be less than 125°C for the worst-case scenario.

Table 3. Bill of Materials for Figure 11

Table 4. Design Parameters

Table 5. Bill of Materials for Figure 16

Table 6. Design Parameters

Table 7. Bill of Materials for Figure 17

Table 8. Design Parameters

Table 9. Bill of Materials for Figure 18

Table 10. Design Parameters

Table 11. Bill of Materials for Figure 19