10.1.3 Controller Layout
Components related to the analog and feedback signals, current limit setting and temperature sense are considered in the following:
- In general, separate power and signal traces, and use a ground plane to provide noise shielding.
- Place all sensitive analog traces and components such as COMP, FB, FADJ, and SS/TRACK away from high-voltage switching nodes such as SW, HG, LG or CBOOT. Use internal layer(s) as ground plane(s). Pay particular attention to shielding the feedback (FB) trace from power traces and components.
- The upper feedback resistor can be connected directly to the output voltage sense point at the load device or the bulk capacitor at the converter side. This connections can be used for the purpose of remote sensing at the downstream load; however, care must be taken to route the trace to prevent noise coupling from noisy nets.
- Connect the OCP setpoint resistor from CS– pin to VOUT and make the connections as close as possible to the LM27402. The trace from the CS– pin to the resistor must avoid coupling to a high-voltage switching node. Similar precautions apply if a resistor is tied to the CS+ pin.
- Minimize the current loop from the VDD and VIN pins through their respective decoupling capacitors to the GND pin. In other words, locate these capacitors as close as possible to the LM27402.