SLCS142H December   2003  – May 2025 LM2901-Q1 , LM2901AV-Q1 , LM2901B-Q1 , LM2901V-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings for  LM2901B-Q1
    2. 5.2  Absolute Maximum Ratings for LM2901x-Q1
    3. 5.3  ESD Ratings
    4. 5.4  Recommended Operating Conditions for LM2901B-Q1
    5. 5.5  Recommended Operating Conditions for LM2901x-Q1
    6. 5.6  Thermal Information
    7. 5.7  Electrical Characteristics for LM2901B-Q1
    8. 5.8  Switching Characteristics for LM2901B-Q1
    9. 5.9  Electrical Characteristics for LM2901x-Q1
    10. 5.10 Switching Characteristics for LM2901x-Q1
    11. 5.11 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram Schematic (Each Comparator)
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Voltage Comparison
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Voltage Range
        2. 7.2.2.2 Minimum Overdrive Voltage
        3. 7.2.2.3 Output and Drive Current
        4. 7.2.2.4 Response Time
      3. 7.2.3 Application Curves
      4. 7.2.4 Application Information Disclaimer
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Related Links
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • PW|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics for LM2901B-Q1

VS = 5V, VCM = (V–) ; TA = 25°C (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIO Input offset voltage VS = 5 to 36V –3.5 ±0.37 3.5 mV
VS = 5 to 36V, TA = –40°C to +125°C –5.5 5.5
IB Input bias current –3.5 –25 nA
TA = –40°C to +125°C –50 nA
IOS Input offset current –25 ±0.5 25 nA
TA = –40°C to +125°C –50 50 nA
VCM Common mode range (1) VS = 3 to 36V (V–)  (V+) – 1.5 V
VS = 3 to 36V, TA = –40°C to +125°C (V–)  (V+) – 2.0 V
AVD Large signal differential
voltage amplification
VS = 15V, VO = 1.4V to 11.4V;
RL ≥ 15k to (V+)
50 200 V/mV
VOL Low level output Voltage
{swing from (V–)}
ISINK ≤ 4mA, VID = -1V 110 400 mV
ISINK ≤ 4mA, VID = -1V
TA =  –40°C to +125°C
550 mV
IOH-LKG High-level output leakage current (V+) = V= 5V; VID = 1V  0.1 50 nA
(V+) = V= 36V; VID = 1V 100 nA
IOL Low level output current VOL = 1.5V; VID = -1V; VS = 5V 6 21 mA
IQ Quiescent current (all comparators) VS = 5V, no load 0.8 1.2 mA
VS = 36V, no load, TA = –40°C to +125°C 1 1.6 mA
When the voltage at either input goes negative by more than 0.3V,  the output can be incorrect and excessive
input current can flow. The upper end of the common-mode voltage range is limited by VCC – 2V. However only one input needs to be
in the valid common mode range, the other input can go up the maximum VCC level and the comparator provides a proper output state.
Either or both inputs can go to maximum VCC level without damage.