SNVS783K January 2012 – August 2021 LM5017
The LM5017 device contains a dual level undervoltage lockout (UVLO) circuit. A summary of threshold voltages and operational states is provided in Section 7.4. When the UVLO pin voltage is below 0.66 V, the regulator is in a low current shutdown mode. When the UVLO pin voltage is greater than 0.66V but less than 1.225 V, the regulator is in standby mode. In standby mode the VCC bias regulator is active while the regulator output is disabled. When the VCC pin exceeds the VCC undervoltage threshold and the UVLO pin voltage is greater than 1.225 V, normal operation begins. An external set-point voltage divider from VIN to GND can be used to set the minimum operating voltage of the regulator.
UVLO hysteresis is accomplished with an internal 20-μA current source that is switched on or off into the impedance of the set-point divider. When the UVLO threshold is exceeded, the current source is activated to quickly raise the voltage at the UVLO pin. The hysteresis is equal to the value of this current times the resistance RUV2.
If the UVLO pin is connected directly to the VIN pin, the regulator will begin operation once the VCC undervoltage is satisfied.