7.3.1 High-Voltage Start-Up Regulator

The LM5030 contains an internal high-voltage start-up regulator. The input pin (V_IN) can be connected directly to line voltages as high as 100 V. The regulator output is internally current limited to 10 mA. Upon power up, the regulator is enabled and sources current into an external capacitor connected to the V_CC pin. The recommended capacitance range for the V_CC regulator is 0.1 µF to 50 µF. When the voltage on the V_CC pin reaches the regulation point of 7.7 V, the controller outputs are enabled. The outputs will remain enabled unless, V_CC falls below 6.1 V or if the SS/SHUTDOWN pin is pulled to ground or an over temperature condition occurs. In typical applications, an auxiliary transformer winding is diode connected to the V_CC pin. This winding raises the V_CC voltage greater than 8 V, effectively shutting off the internal start-up regulator and saving power while reducing the controller dissipation. The external V_CC capacitor must be sized such that the self-bias will maintain a V_CC voltage greater than 6.1 V during the initial start-up. During a fault mode when the converter self bias winding is inactive, external current draw on the V_CC line should be limited as to not exceed the maximum power dissipation of the controller. An external start-up or other bias rail can be used instead of the internal start-up regulator by connecting the V_CC and the Vin pins and feeding the external bias voltage (8 V to 15 V) to that node.

7.3.2 Error Amplifier

An internal high gain error amplifier is provided within the LM5030. The noninverting reference of the amplifier is tied to 1.25 V. In nonisolated applications the power converter output is connected to the VFB pin via the voltage setting resistors and loop compensation is connected between the COMP and VFB pins.

For most isolated applications the error amplifier function is implemented on the secondary side ground. Because the internal error amplifier is configured as an open drain output it can be disabled by connecting VFB to ground. The internal 5-kΩ pullup resistor, connected between the 5-V reference and COMP, can be used as the pullup for an optocoupler or other isolation device.

7.3.3 PWM Comparator

The PWM comparator compares the compensated current ramp signal to the loop error voltage from the internal error amplifier (COMP pin). This comparator is optimized for speed in order to achieve minimum discernable duty cycles. The comparator polarity is such that 0 V on the COMP pin will cause a zero duty cycle.

7.3.4 Current Limit and Current Sense

The LM5030 contains two levels of over-current protection. If the voltage on the current sense comparator exceeds 0.5 V the present cycle is terminated (cycle-by-cycle current limit). If the voltage on the current sense comparator exceeds 0.625 V, the controller will terminate the present cycle and discharge the softstart capacitor. A small RC filter, located near the controller, is recommended for the CS pin. An internal MOSFET discharges the current sense filter capacitor at the conclusion of every cycle, to improve dynamic performance.

The LM5030 CS and PWM comparators are very fast, and as such will respond to short duration noise pulses. Layout considerations are critical for the current sense filter and sense resistor. The capacitor associated with the CS filter must be placed very close to the device and connected directly to the pins of the IC (CS and RTN). Also if a current sense transformer is used, both leads of the transformer secondary should be routed to the sense resistor, which should also be located close to the IC. If a current sense resistor located in the drive transistor sources is used, for current sense, a low inductance resistor should be chosen. In this case all of the noise sensitive low power grounds should be commoned together around the IC and then a single connection should be made to the power ground (sense resistor ground point).

The second level threshold is intended to protect the power converter by initiating a low duty cycle hiccup mode when abnormally high, fast rising currents occur. During excessive loading, the first level threshold will always be reached and the output characteristic of the converter will be that of a current source but this sustained current level can cause excessive temperatures in the power train especially the output rectifiers. If the second level threshold is reached, the softstart capacitor will be fully discharged, a retry will commence following the discharge detection. The second level threshold will only be reached when a high dV/dt is present at the current sense pin. The signal must be fast enough to reach the second level threshold before the first threshold detector turns off the driver. This can usually happen for a saturated power inductor or shorted load. Excessive filtering on the CS pin, extremely low value current sense resistor or an inductor that does not saturate with excessive loading may prevent the second level threshold from ever being reached.

7.3.5 Oscillator, Shutdown and Sync Capability

The LM5030 oscillator is set by a single external resistor connected between the RT pin and return. To set a desired oscillator frequency, the necessary RT resistor can be calculated in Equation 1:

Equation 1.

Each output switches at half the oscillator frequency in a push-pull configuration. The LM5030 can also be synchronized to an external clock. The external clock must be of higher frequency than the free running frequency set by the RT resistor. The clock signal should be capacitively coupled into the RT pin with a 100-pF capacitor. A peak voltage level greater than 3 V with respect to ground is required for detection of the sync pulse. The sync pulse width should be set in the 15- to 150-ns range by the external components. The RT resistor is always required, whether the oscillator is free running or externally synchronized. The voltage at the RT pin is internally regulated to a nominal 2 V.

Locate the RT resistor close to the device and connected directly to the pins of the IC (RT and GND).

7.3.6 Slope Compensation

The PWM comparator compares the current sense signal to the voltage derived from the COMP pin. The COMP voltage is set by either the internal error amplifier or an external error amplifier through an optocoupler. At duty cycles greater than 50% (composite of alternating outputs) current mode control circuits are prone to subharmonic oscillation. By adding an additional ramp signal to the current sense ramp signal this condition can be avoided. The LM5030 integrates this slope compensation by buffering the internal oscillator ramp and summing it internally to the current sense (CS) signal. Additional slope compensation may be added by increasing the source impedance of the current sense signal.

7.3.7 Soft Start and Shutdown

The soft-start feature allows the converter to gradually reach the initial steady state operating point, thus reducing start-up stresses and surges. An internal 10-μA current source and an external capacitor generate a ramping voltage signal that limits the error amplifier output during start-up. In the event of a second level current limit fault, the soft-start capacitor will be fully discharged which disables the output drivers. When the fault condition is no longer present, the soft-start capacitor is released to ramp and gradually restart the converter. The SS pin can also be used to disable the controller. If the SS pin voltage is pulled down below 0.45 V (nominal) the controller will disable the outputs and enter a low power state.

7.3.8 OUT1, OUT2, and Time Delay

The LM5030 provides two alternating outputs, OUT1 and OUT2. The internal gate drivers can each sink 1.5-A peak each. The maximum duty cycle for each output is inherently limited to less than 50%. The typical deadtime between the falling edge of one gate driver output and the rising edge of the other gate driver output is 135 ns.

7.3.9 Thermal Protection

Internal thermal-shutdown circuitry is provided to protect the integrated circuit in the event the excessive junction temperature. When activated, typically at 165°C, the controller is forced into a low-power reset state, disabling the output drivers and the bias regulator. This feature is provided to prevent catastrophic failures from accidental device overheating.