SNVSBK9C November 2019 – September 2020 LM63635-Q1
The output voltage of the LM63635-Q1 is set by the condition of the VSEL input. This example requires a 5-V output, so the VSEL input is connected to VCC and the FB input is connected directly to the output capacitor.
For cases where the desired output voltage is other than 5 V or 3.3 V, an external feedback divider is required. As shown in Figure 9-2, the divider network is comprised of RFBT and RFBB, and closes the loop between the output voltage and the converter. In this case, a 10-kΩ resistor is connected from the VSEL input to ground. The converter regulates the output voltage by holding the voltage on the FB pin equal to the internal reference voltage, 1 V. The resistance of the divider is a compromise between excessive noise pickup and excessive loading of the output. Smaller values of resistance reduce noise sensitivity, but also reduce the light-load efficiency. The recommended value for RFBT is 100 kΩ with a maximum value of 1 MΩ. If 1 MΩ is selected for RFBT, then a feedforward capacitor must be used across this resistor to provide adequate loop phase margin (see Section 188.8.131.52.1). Once RFBT is selected, Equation 5 is used to select RFBB. VREF is nominally 1 V.