SNVSCH2A September   2024  – May 2025 LM65625-Q1 , LM65635-Q1 , LM65645-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Voltage Selection
      2. 7.3.2 EN Pin and Use as VIN UVLO
      3. 7.3.3 Mode Selection
        1. 7.3.3.1 MODE/SYNC Pin Uses for Synchronization
        2. 7.3.3.2 Clock Locking
      4. 7.3.4 Adjustable Switching Frequency
      5. 7.3.5 Dual Random Spread Spectrum (DRSS)
      6. 7.3.6 Internal LDO, VCC UVLO, and BIAS Input
      7. 7.3.7 Bootstrap Voltage (BST Pin)
      8. 7.3.8 Soft Start and Recovery From Dropout
      9. 7.3.9 Safety Features
        1. 7.3.9.1 Power-Good Monitor
        2. 7.3.9.2 Overcurrent and Short-Circuit Protection
        3. 7.3.9.3 Hiccup
        4. 7.3.9.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
        1. 7.4.2.1 Peak Current Mode Operation
        2. 7.4.2.2 Auto Mode Operation
          1. 7.4.2.2.1 Diode Emulation
        3. 7.4.2.3 FPWM Mode Operation
        4. 7.4.2.4 Dropout
        5. 7.4.2.5 Recovery from Dropout
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Choosing the Switching Frequency
        3. 8.2.2.3 FB for Adjustable or Fixed Output Voltage Mode
        4. 8.2.2.4 Inductor Selection
        5. 8.2.2.5 Output Capacitor Selection
        6. 8.2.2.6 Input Capacitor Selection
        7. 8.2.2.7 CBOOT
        8. 8.2.2.8 External UVLO
        9. 8.2.2.9 Maximum Ambient Temperature
      3. 8.2.3 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.2.3 FPWM Mode Operation

Like auto mode operation, FPWM mode operation during light-load operation is selected using the SYNC/MODE pin.

In FPWM Mode, frequency is maintained while lightly loaded. To maintain frequency, a limited reverse current is allowed to flow through the inductor. Reverse current is limited by reverse current limit circuitry. See the Electrical Characteristics for reverse current limit values.

LM65625-Q1 LM65635-Q1 LM65645-Q1 FPWM Mode Operation
FPWM mode Continuous Conduction (CCM) is possible even if IOUT is less than half of Iripple.
Figure 7-12 FPWM Mode Operation

In FPWM mode, frequency reduction can occur if the input voltage is high enough to command minimum on-time, even while lightly loaded. This foldback feature allows to sustain regulation during input voltage transient events.