SNOS469J Data sheet

SNOS469J April 2000 – January 2015 LM8261

PRODUCTION DATA.

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Mechanical Data (Package|Pins)

DBV|5
- MPDS018S

Thermal pad, mechanical data (Package|Pins)

Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings⁽¹⁾

		MIN	MAX	UNIT
V_IN Differential			±10	V
Output Short Circuit Duration		See⁽³⁾⁽⁵⁾
Supply Voltage (V⁺ - V⁻)			32	V
Voltage at Input/Output pins			V⁺ +0.8 V, V⁻ −0.8 V	V
Storage Temperature Range		−65	+150	°C
Junction Temperature⁽⁴⁾			150	°C
Soldering Information:	Infrared or Convection (20 sec.)		235	°C
Soldering Information:	Wave Soldering (10 sec.)		260	°C

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Rating indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see Electrical Characteristics 2.7 V.

(2) Human Body Model is 1.5 kΩ in series with 100 pF.

(3) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C.

(4) The maximum power dissipation is a function of T_J(max), R_θJA, and T_A. The maximum allowable power dissipation at any ambient temperature is P_D = (T_J(MAX) - T_A)/ R_θJA. All numbers apply for packages soldered directly onto a PC board.

(5) Allowable Output Short Circuit duration is infinite for V_S ≤ 6 V at room temperature and below. For V_S > 6 V, allowable short circuit duration is 1.5 ms.

(6) Machine Model, 0 Ω is series with 200 pF.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾⁽²⁾	±2000	V
V_(ESD)	Electrostatic discharge	Machine model (MM)⁽⁶⁾	±200	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 2000-V HBM is possible with the necessary precautions. Pins listed as ±200 V may actually have higher performance.

6.3 Recommended Operating Conditions

		MIN	MAX	UNIT
Supply Voltage (V⁺ - V⁻)		2.5	30	V
Temperature Range⁽²⁾		−40	+85	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾⁽²⁾		DBV	UNIT
THERMAL METRIC⁽¹⁾⁽²⁾		(5 PINS)	UNIT
R_θJA	Junction-to-ambient thermal resistance	325	°C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2) The maximum power dissipation is a function of T_J(max), R_θJA, and T_A. The maximum allowable power dissipation at any ambient temperature is P_D = (T_J(MAX) - T_A)/ R_θJA. All numbers apply for packages soldered directly onto a PC board.

6.5 Electrical Characteristics 2.7 V

Unless otherwise specified, all limits guaranteed for T_A = 25°C, V⁺ = 2.7 V, V⁻ = 0 V, V_CM = 0.5 V, V_O = V⁺/2, and R_L > 1 MΩ to V⁻.⁽¹⁾

	PARAMETER	TEST CONDITIONS		MIN	TYP⁽²⁾	MAX⁽³⁾	UNIT
V_OS	Input Offset Voltage	V_CM = 0.5 V & V_CM = 2.2 V			+/−0.7	+/−5	mV
V_OS	Input Offset Voltage	V_CM = 0.5 V & V_CM = 2.2 V	−65°C ≤ T_J≤ +150°C			+/−7	mV
TC V_OS	Input Offset Average Drift	V_CM = 0.5 V & V_CM = 2.2 V⁽⁴⁾			+/−2		µV/C
I_B	Input Bias Current	V_CM = 0.5 V⁽⁵⁾			−1.20	−2.00	µA
		V_CM = 0.5 V⁽⁵⁾	−65°C ≤ T_J≤ +150°C			−2.70
		V_CM = 2.2 V⁽⁵⁾			+0.49	+1.00
		V_CM = 2.2 V⁽⁵⁾	−65°C ≤ T_J≤ +150°C			+1.60
I_OS	Input Offset Current	V_CM = 0.5 V & V_CM = 2.2 V			20	250	nA
I_OS	Input Offset Current	V_CM = 0.5 V & V_CM = 2.2 V	−65°C ≤ T_J≤ +150°C			400	nA
CMRR	Common Mode Rejection Ratio	V_CM stepped from 0 V to 1.0 V			100	76	dB
		V_CM stepped from 0 V to 1.0 V	−65°C ≤ T_J≤ +150°C	60
		V_CM stepped from 1.7 V to 2.7 V			100
		V_CM stepped from 0 V to 2.7 V			70	58
		V_CM stepped from 0 V to 2.7 V	−65°C ≤ T_J≤ +150°C	50
+PSRR	Positive Power Supply Rejection Ratio	V⁺ = 2.7 V to 5 V			104	78	dB
+PSRR	Positive Power Supply Rejection Ratio	V⁺ = 2.7 V to 5 V	−65°C ≤ T_J≤ +150°C	74			dB
CMVR	Input Common-Mode Voltage Range	CMRR > 50 dB			−0.3	−0.1	V
			−65°C ≤ T_J≤ +150°C			0.0	V
					3.0	2.8	V
			−65°C ≤ T_J≤ +150°C	2.7			V
A_VOL	Large Signal Voltage Gain	V_O = 0.5 to 2.2 V, R_L = 10K to V⁻			78	70	dB
		V_O = 0.5 to 2.2 V, R_L = 10K to V⁻	−65°C ≤ T_J≤ +150°C	67			dB
		V_O = 0.5 to 2.2 V, R_L = 2K to V⁻			73	67	dB
		V_O = 0.5 to 2.2 V, R_L = 2K to V⁻	−65°C ≤ T_J≤ +150°C	63			dB
V_O	Output Swing High	R_L = 10K to V⁻			2.59	2.49	V
		R_L = 10K to V⁻	−65°C ≤ T_J≤ +150°C	2.46
		R_L = 2K to V⁻			2.53	2.45
		R_L = 2K to V⁻	−65°C ≤ T_J≤ +150°C	2.41
	Output Swing Low	R_L = 10K to V⁻			90	100	mV
	Output Swing Low	R_L = 10K to V⁻	−65°C ≤ T_J≤ +150°C			120	mV
I_SC	Output Short Circuit Current	Sourcing to V⁻ V_ID = 200 mV⁽⁶⁾⁽⁷⁾			48	30	mA
		Sourcing to V⁻ V_ID = 200 mV⁽⁶⁾⁽⁷⁾	−65°C ≤ T_J≤ +150°C	20			mA
		Sinking to V⁺ V_ID = −200 mV⁽⁶⁾⁽⁷⁾			65	50	mA
		Sinking to V⁺ V_ID = −200 mV⁽⁶⁾⁽⁷⁾	−65°C ≤ T_J≤ +150°C	30			mA
I_S	Supply Current	No load, V_CM = 0.5 V			0.95	1.20	mA
I_S	Supply Current	No load, V_CM = 0.5 V	−65°C ≤ T_J≤ +150°C			1.50	mA
SR	Slew Rate⁽⁸⁾	A_V = +1,V_I = 2 V_PP			9		V/µs
f_u	Unity Gain-Frequency	V_I = 10 mV, R_L = 2 KΩ to V⁺/2			10		MHz
GBWP	Gain Bandwidth Product	f = 50 KHz			21	15.5	MHz
GBWP	Gain Bandwidth Product	f = 50 KHz	−65°C ≤ T_J≤ +150°C	14			MHz
Phi_m	Phase Margin	V_I = 10 mV			50		Deg
e_n	Input-Referred Voltage Noise	f = 2 KHz, R_S = 50 Ω			15		nV/ √Hz
i_n	Input-Referred Current Noise	f = 2 KHz			1		pA/ √Hz
f_MAX	Full Power Bandwidth	Z_L = (20 pF \|\| 10 KΩ) to V⁺/2			1		MHz

(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA.

(2) Typical Values represent the most likely parametric norm.

(3) All limits are guaranteed by testing or statistical analysis.

(4) Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.

(5) Positive current corresponds to current flowing into the device.

(6) Production Short Circuit test is a momentary test. See ^{Note 7}.

(7) Allowable Output Short Circuit duration is infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5 ms.

(8) Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower.

6.6 Electrical Characteristics 5 V⁽¹⁾

Unless otherwise specified, all limited guaranteed for T_A = 25°C, V⁺ = 5 V, V⁻ = 0 V, V_CM = 1 V, V_O = V⁺/2, and R_L > 1 MΩ to V⁻.

	PARAMETER	TEST CONDITIONS		MIN	TYP⁽²⁾	MAX⁽³⁾	UNIT
V_OS	Input Offset Voltage	V_CM = 1 V & V_CM = 4.5 V			+/−0.7	+/−5	mV
V_OS	Input Offset Voltage	V_CM = 1 V & V_CM = 4.5 V	−65°C ≤ T_J≤ +150°C			+/− 7	mV
TC V_OS	Input Offset Average Drift	V_CM = 1 V & V_CM = 4.5 V⁽⁴⁾			+/−2		µV/°C
I_B	Input Bias Current	V_CM = 1 V⁽⁵⁾			−1.18	−2.00	µA
		V_CM = 1 V⁽⁵⁾	−65°C ≤ T_J≤ +150°C			−2.70
		V_CM = 4.5 V⁽⁵⁾			+0.49	+1.00
		V_CM = 4.5 V⁽⁵⁾	−65°C ≤ T_J≤ +150°C			+1.60
I_OS	Input Offset Current	V_CM = 1 V & V_CM = 4.5 V			20	250	nA
I_OS	Input Offset Current	V_CM = 1 V & V_CM = 4.5 V	−65°C ≤ T_J≤ +150°C			400	nA
CMRR	Common Mode Rejection Ratio	V_CM stepped from 0 V to 3.3 V			110	84	dB
		V_CM stepped from 0 V to 3.3 V	−65°C ≤ T_J≤ +150°C	72
		V_CM stepped from 4 V to 5 V			100
		V_CM stepped from 0 V to 5 V			80	64
		V_CM stepped from 0 V to 5 V	−65°C ≤ T_J≤ +150°C	61
+PSRR	Positive Power Supply Rejection Ratio	V⁺ = 2.7 V to 5 V, V_CM = 0.5 V			104	78	dB
+PSRR	Positive Power Supply Rejection Ratio	V⁺ = 2.7 V to 5 V, V_CM = 0.5 V	−65°C ≤ T_J≤ +150°C	74			dB
CMVR	Input Common-Mode Voltage Range	CMRR > 50 dB			−0.3	−0.1	V
			−65°C ≤ T_J≤ +150°C			0.0	V
					5.3	5.1	V
			−65°C ≤ T_J≤ +150°C	5.0			V
A_VOL	Large Signal Voltage Gain	V_O = 0.5 to 4.5 V, R_L = 10 K to V⁻			84	74	dB
		V_O = 0.5 to 4.5 V, R_L = 10 K to V⁻	−65°C ≤ T_J≤ +150°C	70
		V_O = 0.5 to 4.5 V, R_L = 2 K to V⁻			80	70
		V_O = 0.5 to 4.5 V, R_L = 2 K to V⁻	−65°C ≤ T_J≤ +150°C	66
V_O	Output Swing High	R_L = 10 K to V⁻			4.87	4.75	V
		R_L = 10 K to V⁻	−65°C ≤ T_J≤ +150°C	4.72
		R_L = 2 K to V⁻			4.81	4.70
		R_L = 2 K to V⁻	−65°C ≤ T_J≤ +150°C	4.66
	Output Swing Low	R_L = 10 K to V⁻			86	125	mV
	Output Swing Low	R_L = 10 K to V⁻	−65°C ≤ T_J≤ +150°C			135	mV
I_SC	Output Short Circuit Current	Sourcing to V⁻ V_ID = 200 mV⁽⁶⁾⁽⁷⁾			53	35	mA
		Sourcing to V⁻ V_ID = 200 mV⁽⁶⁾⁽⁷⁾	−65°C ≤ T_J≤ +150°C	20
		Sinking to V⁺ V_ID = −200 mV⁽⁶⁾⁽⁷⁾			75	60
		Sinking to V⁺ V_ID = −200 mV⁽⁶⁾⁽⁷⁾	−65°C ≤ T_J≤ +150°C	50
I_S	Supply Current	No load, V_CM = 1 V			0.97	1.25	mA
I_S	Supply Current	No load, V_CM = 1 V	−65°C ≤ T_J≤ +150°C			1.75	mA
SR	Slew Rate⁽⁸⁾	A_V = +1, V_I = 5 V_PP			12	10	V/µs
SR	Slew Rate⁽⁸⁾	A_V = +1, V_I = 5 V_PP	−65°C ≤ T_J≤ +150°C	7			V/µs
f_u	Unity Gain Frequency	V_I = 10 mV, R_L = 2 KΩ to V⁺/2			10.5		MHz
GBWP	Gain-Bandwidth Product	f = 50 KHz			21	16	MHz
GBWP	Gain-Bandwidth Product	f = 50 KHz	−65°C ≤ T_J≤ +150°C	15			MHz
Phi_m	Phase Margin	V_I = 10 mV			53		Deg
e_n	Input-Referred Voltage Noise	f = 2 KHz, R_S = 50 Ω			15		nV/ √hZ
i_n	Input-Referred Current Noise	f = 2 KHz			1		pA/ √hZ
f_MAX	Full Power Bandwidth	Z_L = (20 pF \|\| 10 kΩ) to V⁺/2			900		KHz
t_S	Settling Time (±5%)	100 mV_PP Step, 500 pF load			400		ns
THD+N	Total Harmonic Distortion + Noise	R_L = 1 KΩ to V⁺/2 f = 10 KHz to A_V= +2, 4 V_PP swing			0.05%

(2) Typical Values represent the most likely parametric norm.

(3) All limits are guaranteed by testing or statistical analysis.

(4) Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.

(5) Positive current corresponds to current flowing into the device.

(6) Production Short Circuit test is a momentary test. See ^{Note 7}.

(7) Allowable Output Short Circuit duration is infinite for VS ≤ 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms.

(8) Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower.

6.7 Electrical Characteristics ±15 V⁽⁷⁾

Unless otherwise specified, all limited guaranteed for T_A = 25°C, V⁺ = 15 V, V⁻ = −15 V, V_CM = 0 V, V_O = 0 V, and R_L > 1 MΩ to 0 V.

	PARAMETER	TEST CONDITIONS		MIN	TYP⁽¹⁾	MAX⁽²⁾	UNIT
V_OS	Input Offset Voltage	V_CM = −14.5 V & V_CM = 14.5 V			+/−0.7	+/−7	mV
V_OS	Input Offset Voltage	V_CM = −14.5 V & V_CM = 14.5 V	−65°C ≤ T_J≤ +150°C			+/− 9	mV
TC V_OS	Input Offset Average Drift	V_CM = −14.5 V & V_CM = 14.5 V⁽⁶⁾			+/−2		µV/°C
I_B	Input Bias Current	V_CM = −14.5 V⁽³⁾			−1.05	−2.00	µA
		V_CM = −14.5 V⁽³⁾	−65°C ≤ T_J≤ +150°C			−2.80
		V_CM = 14.5 V⁽³⁾			+0.49	+1.00
		V_CM = 14.5 V⁽³⁾	−65°C ≤ T_J≤ +150°C			+1.50
I_OS	Input Offset Current	V_CM = −14.5 V & V_CM = 14.5 V			30	275	nA
I_OS	Input Offset Current	V_CM = −14.5 V & V_CM = 14.5 V	−65°C ≤ T_J≤ +150°C			550	nA
CMRR	Common Mode Rejection Ratio	V_CM stepped from −15 V to 13 V			100	84	dB
		V_CM stepped from −15 V to 13 V	−65°C ≤ T_J≤ +150°C	80
		V_CM stepped from 14 V to 15 V			100
		V_CM stepped from −15 V to 15 V			88	74
		V_CM stepped from −15 V to 15 V	−65°C ≤ T_J≤ +150°C	72
+PSRR	Positive Power Supply Rejection Ratio	V⁺ = 12 V to 15 V			100	70	dB
+PSRR	Positive Power Supply Rejection Ratio	V⁺ = 12 V to 15 V	−65°C ≤ T_J≤ +150°C	66			dB
−PSRR	Negative Power Supply Rejection Ratio	V⁻ = −12 V to −15 V			100	70	dB
−PSRR	Negative Power Supply Rejection Ratio	V⁻ = −12 V to −15 V	−65°C ≤ T_J≤ +150°C	66			dB
CMVR	Input Common-Mode Voltage Range	CMRR > 50 dB			−15.3	−15.1	V
			−65°C ≤ T_J≤ +150°C			−15.0	V
					15.3	15.1	V
			−65°C ≤ T_J≤ +150°C	15.0			V
A_VOL	Large Signal Voltage Gain	V_O = 0 V to ±13 V, R_L = 10 KΩ			85	78	dB
		V_O = 0 V to ±13 V, R_L = 10 KΩ	−65°C ≤ T_J≤ +150°C	74
		V_O = 0 V to ±13 V, R_L = 2 KΩ			79	72
		V_O = 0 V to ±13 V, R_L = 2 KΩ	−65°C ≤ T_J≤ +150°C	66
V_O	Output Swing High	R_L = 10 KΩ			14.83	14.65	V
		R_L = 10 KΩ	−65°C ≤ T_J≤ +150°C	14.61
		R_L = 2 KΩ			14.73	14.60
		R_L = 2 KΩ	−65°C ≤ T_J≤ +150°C	14.55
	Output Swing Low	R_L = 10 KΩ			−14.91	−14.75	V
		R_L = 10 KΩ	−65°C ≤ T_J≤ +150°C			−14.65
		R_L = 2 KΩ			−14.83	−14.65
		R_L = 2 KΩ	−65°C ≤ T_J≤ +150°C			−14.60
I_SC	Output Short Circuit Current	Sourcing to ground V_ID = 200 mV⁽⁵⁾⁽⁵⁾			60	40	mA
		Sourcing to ground V_ID = 200 mV⁽⁵⁾⁽⁵⁾	−65°C ≤ T_J≤ +150°C	25
		Sinking to ground V_ID = 200 mV⁽⁵⁾⁽⁵⁾			100	70
		Sinking to ground V_ID = 200 mV⁽⁵⁾⁽⁵⁾	−65°C ≤ T_J≤ +150°C	60
I_S	Supply Current	No load, V_CM = 0 V			1.30	1.50	mA
I_S	Supply Current	No load, V_CM = 0 V	−65°C ≤ T_J≤ +150°C			1.90	mA
SR	Slew Rate⁽⁴⁾	A_V = +1, V_I = 24 V_PP			15	10	V/µs
SR	Slew Rate⁽⁴⁾	A_V = +1, V_I = 24 V_PP	−65°C ≤ T_J≤ +150°C	8			V/µs
f_u	Unity Gain Frequency	V_I = 10 mV, R_L = 2 KΩ			14		MHz
GBWP	Gain-Bandwidth Product	f = 50 KHz			24	18	MHz
GBWP	Gain-Bandwidth Product	f = 50 KHz	−65°C ≤ T_J≤ +150°C	16			MHz
Phi_m	Phase Margin	V_I = 10 mV			58		Deg
e_n	Input-Referred Voltage Noise	f = 2 KHz, R_S = 50 Ω			15		nV/ √hZ
i_n	Input-Referred Current Noise	f = 2 KHz			1		pA/ √hZ
f_MAX	Full Power Bandwidth	Z_L = 20 pF \|\| 10 KΩ			160		KHz
t_s	Settling Time (±1%, A_V = +1)	Positive Step, 5 V_PP			320		ns
t_s	Settling Time (±1%, A_V = +1)	Negative Step, 5 V_PP			600		ns
THD+N	Total Harmonic Distortion +Noise	R_L = 1 KΩ, f = 10 KHz, A_V = +2, 28V_PP swing			0.01%

(1) Typical Values represent the most likely parametric norm.

(2) All limits are guaranteed by testing or statistical analysis.

(3) Positive current corresponds to current flowing into the device.

(4) Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower.

(5) Production Short Circuit test is a momentary test. See ^{Note 7}.

(6) Offset voltage average drift determined by dividing the change in V_OS at temperature extremes into the total temperature change.

(7) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that T_J = T_A. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where T_J > T_A.