SNOS674I October   1997  – February 2024 LMC6482 , LMC6484

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information LMC6482
    5. 5.5 Thermal Information LMC6484
    6. 5.6 Electrical Characteristics: VS = 5V
    7. 5.7 Electrical Characteristics: VS = 3V
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Amplifier Topology
      2. 6.3.2 Input Common-Mode Voltage Range
      3. 6.3.3 Rail-to-Rail Output
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Upgrading Applications
      2. 7.1.2 Data Acquisition Systems
      3. 7.1.3 Instrumentation Circuits
    2. 7.2 Typical Applications
      1. 7.2.1 3V Single-Supply Buffer Circuit
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Capacitive Load Compensation
          2. 7.2.1.2.2 Capacitive Load Tolerance
          3. 7.2.1.2.3 Compensating For Input Capacitance
          4. 7.2.1.2.4 Offset Voltage Adjustment
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Typical Single-Supply Applications
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Spice Macromodel
        2. 8.1.1.2 PSpice® for TI
        3. 8.1.1.3 TINA-TI™ Simulation Software (Free Download)
        4. 8.1.1.4 DIP-Adapter-EVM
        5. 8.1.1.5 DIYAMP-EVM
        6. 8.1.1.6 TI Reference Designs
        7. 8.1.1.7 Filter Design Tool
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
  • DGK|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

GUID-CD30933B-FDA3-4D18-BF91-4064782A917F-low.gif Figure 4-1 LMC6482: D Package, 8-Pin SIOIC,
DGK Package, 8-Pin VSSOP,
and P Package, 8-pin PDIP (Top View)
Table 4-1 Pin Functions: LMC6482
PIN TYPE DESCRIPTION
NO. NAME
1 OUT A Output Output for amplifier A
2 −IN A Input Inverting input for amplifier A
3 +IN A Input Noninverting input for amplifier A
4 V– Power Negative supply voltage input
5 +IN B Input Noninverting input for amplifier B
6 −IN B Input Inverting input for amplifier B
7 OUT B Output Output for amplifier B
8 V+ Power Positive supply voltage input
GUID-E4345B66-106B-4662-8A41-57CE2F2BD88F-low.gif Figure 4-2 LMC6484: D Package, 14-Pin SOIC,
and N Package, 14-Pin PDIP (Top View)
Table 4-2 Pin Functions: LMC6484
PIN TYPE DESCRIPTION
NO. NAME
1 OUT A Output Output for amplifier A
2 −IN A Input Inverting input for amplifier A
3 +IN A Input Noninverting input for amplifier A
4 V+ Power Positive supply voltage input
5 +IN B Input Noninverting input for amplifier B
6 −IN B Input Inverting input for amplifier B
7 OUT B Output Output for amplifier B
8 OUT C Output Output for amplifier C
9 −IN C Input Inverting input for amplifier C
10 +IN C Input Noninverting input for amplifier C
11 V– Power Negative supply voltage input
12 +IN C Input Inverting input for amplifier D
13 +IN C Input Noninverting input for amplifier D
14 OUT C Output Output for amplifier D