LMC6482 Ultra-low Bias Current, Precision CMOS Rail-to-Rail Input and Output Dual Operational Amplifier | TI.com

LMC6482
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Ultra-low Bias Current, Precision CMOS Rail-to-Rail Input and Output Dual Operational Amplifier

Ultra-low Bias Current, Precision CMOS Rail-to-Rail Input and Output Dual Operational Amplifier - LMC6482
Datasheet
LMC6482 CMOS Dual Rail-to-Rail Input and Output Operational Amplifier datasheet (Rev. E)
 

For higher GBW and SR, higher DC precision, 50% less noise, 66% lower IQ and extended industrial temperature range, check out the  OPA2196.

Description

The LMC6482 device provides a common-mode range that extends to both supply rails. This rail-to-rail performance combined with excellent accuracy, due to a high CMRR, makes it unique among rail-to-rail input amplifiers. The device is ideal for systems, such as data acquisition, that require a large input signal range. The LMC6482 is also an excellent upgrade for circuits using limited common-mode range amplifiers such as the TLC272 and TLC277.

Maximum dynamic signal range is assured in low voltage and single supply systems by the rail-to-rail output swing of the LMC6482. The rail-to-rail output swing is ensured for loads down to 600 Ω of the device. Ensured low-voltage characteristics and low-power dissipation make the LMC6482 especially well-suited for battery-operated systems. LMC6482 is also available in a VSSOP package, which is almost half the size of a SOIC-8 device. See the LMC6484 data sheet for a quad CMOS operational amplifier with these same features.

Features

  • Typical Unless Otherwise Noted
  • Rail-to-Rail Input Common-Mode Voltage Range
    (Ensured Over Temperature)
  • Rail-to-Rail Output Swing (Within 20-mV of Supply
    Rail, 100-kΩ Load)
  • Ensured 3-V, 5-V, and 15-V Performance
  • Excellent CMRR and PSRR: 82 dB
  • Ultralow Input Current: 20 fA
  • High Voltage Gain (R L = 500 k Ω): 130 dB
  • Specified for 2-kΩ and 600-Ω Loads
  • Power-Good Output
  • Available in VSSOP Package

Parametrics

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Part number Order Number of channels (#) Total supply voltage (Min) (+5V=5, +/-5V=10) Total supply voltage (Max) (+5V=5, +/-5V=10) GBW (Typ) (MHz) Slew rate (Typ) (V/us) Rail-to-rail Vos (offset voltage @ 25 C) (Max) (mV) Offset drift (Typ) (uV/C) Iq per channel (Typ) (mA) Vn at 1 kHz (Typ) (nV/rtHz) CMRR (Typ) (dB) Rating Operating temperature range (C) Package Group Package size: mm2:W x L (PKG) Input bias current (Max) (pA) Output current (Typ) (mA) Features Architecture
LMC6482 Order now 2     3     15.5     1.5     1.3     In
Out    		 0.75     1     0.5     37     82     Catalog     -40 to 85     PDIP | 8
SOIC | 8
VSSOP | 8    		 8PDIP: 93 mm2: 9.43 x 9.81 (PDIP | 8)
8SOIC: 19 mm2: 3.91 x 4.9 (SOIC | 8)
8VSSOP: 15 mm2: 4.9 x 3 (VSSOP | 8)    		 4     30         CMOS    
OPA2187 Order now 2     4.5     36     0.55     0.2     In to V-
Out    		 0.01     0.001     0.1     20     114     Catalog     -40 to 125     SOIC | 8
VSSOP | 8    		 8SOIC: 19 mm2: 3.91 x 4.9 (SOIC | 8)
8VSSOP: 15 mm2: 4.9 x 3 (VSSOP | 8)    		 350     30     EMI Hardened
Zero Drift    		 CMOS    
TLV2186 Order now 2     4.5     24     0.75     0.35     In
Out    		 0.25     0.1     0.09     38     134     Catalog     -40 to 125     SOIC | 8     8SOIC: 19 mm2: 3.91 x 4.9 (SOIC | 8)     600     20     Cost Optimized
EMI Hardened
High Cload Drive
Small Size
Zero Drift    		 CMOS