SNOSCY4E March 2015 – October 2018 LMG5200
Figure 11 shows a synchronous buck converter application with VCC connected to a 5-V supply. It is critical to optimize the power loop (loop impedance from VIN capacitor to PGND). Having a high power loop inductance causes significant ringing in the SW node and also causes the associated power loss. Refer to the Layout Guidelines section for information on how to minimize this power loop.