SNLS309I April 2010 – December 2014 LMH1983
It is important to ensure that the LMH1983 is provided with an adequate power supply that provides the cleanest voltage to the VDD_IO and VDD supply pins. One potential source of jitter on a multiple clock system such as the LMH1983 is interference among the four PLLs on the chip. To help reduce this effect, each PLL is run from a separate power supply internally on the LMH1983, and each supply has its own internal regulator. These regulators each require their own external bypass as seen in Figure 32 with bypass capacitors.