SNCS102G June   2005  – August 2018 LMH6572

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
  4. Revision History
  5. Pin Configuration and Functions
    1.     Truth Table
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 ±5V Electrical Characteristics
    6. 6.6 ±3.3V Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Feature Description
      1. 7.2.1 Single Supply Operation
      2. 7.2.2 Video Performance
      3. 7.2.3 Gain Accuracy
      4. 7.2.4 Expanding the Multiplexer
      5. 7.2.5 Other Applications
        1. 7.2.5.1 Driving Capacitive Loads
  8. Power Supply Recommendations
    1. 8.1 Power Dissipation
    2. 8.2 ESD Protection
  9. Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 Evaluation Boards
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Community Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Expanding the Multiplexer

It is possible to build higher density multiplexers by paralleling several LMH6572s. Figure 20 shows a 4:1 RGB MUX using two LMH6572s:

LMH6572 20109618.pngFigure 20. RGB MUX Using Two LMH6572's

If it is important in the end application to make sure that no two inputs are presented to the output at the same time, an optional delay block can be added prior to the ENABLE(EN) pin of each device, as shown. Figure 21 shows one possible approach to this delay circuit. The delay circuit shown will delay ENABLE’s H to L transitions (R1 and C1 decay) but will not delay its L to H transition.

LMH6572 20109619.pngFigure 21. Delay Circuit Implementation

R2 should be kept small compared to R1 in order to not reduce the ENABLE voltage and to produce little or no delay to the ENABLE L to H transition.

With the ENABLE pin putting the output stage into a high impedance state, several LMH6572’s can be tied together to form a larger input MUX. However, there is a slight loading effect on the active output caused by the off-channel feedback and gain set resistors, as shown in Figure 21. Figure 22 is assuming there are four LMH6572 devices tied together to form a triple 8:1 MUX. With the internal resistors valued at approximately 800Ω, the gain error is about -0.57 dB, or about −6%.

LMH6572 20109617.pngFigure 22. Multiplexer Input Expansion by Combining Outputs

An alternate approach would be to tie the outputs directly together and let all devices share a common back termination resistor in order to alleviate the gain error issue above.

The drawback in this case is the increased capacitive load presented to the output of each LMH6572 due to the offstate capacitance of the LMH6572.