SNOSCX0A June   2013  – December 2014 LMP92064

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Current Sense Input Channel
      2. 7.3.2 Current Sense Input Channel Common-Mode and Differential Voltage Range (Dynamic Range Considerations)
      3. 7.3.3 Voltage Sense Input Channel
      4. 7.3.4 Reference
      5. 7.3.5 Reset
      6. 7.3.6 Device Power-Up Sequence
    4. 7.4 Device Functional Modes
      1. 7.4.1 ADC Operation
    5. 7.5 Register Maps
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Digital Isolators
        2. 8.2.2.2 Supply Voltage for the LMP92064
        3. 8.2.2.3 Series Resistor for the Shunt Regulator
        4. 8.2.2.4 Voltage Channel Input Resistor Divider
        5. 8.2.2.5 Sense Resistor Selection
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Current Input Error Sources
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

  • Connect the sense resistor pads directly to the INCP and INCN inputs of the LMP92064 using “Kelvin” or “4-wire” connection techniques. See the Current Input Error Sources and Layout Considerations section for more information.
  • Bypass capacitors should be placed in close proximity to the supply pins. It is recommended to use a 0.1-μF capacitor on each supply pin. Additional bypass capacitors can be used.
  • A 1-μF ceramic bypass capacitor should be placed in close proximity to the REFC pin.
  • The SPI signals traces should be routed close together.
  • Series resistors should be placed at the SPI sources.

10.1.1 Current Input Error Sources

The traces leading to and from the sense resistor can be significant error sources. With small value sense resistors (<100 mΩ), trace resistance shared with the load can cause significant errors. TI recommends connecting the sense resistor pads directly to the INCP and INCN inputs of the LMP92064 using “Kelvin” or “4-wire” connection techniques. An example is shown in Figure 28.

kelvin_sensing_noscx0.gifFigure 28. 4-Wire "Kelvin" Sensing Technique

Because the sense traces only carry the amplifier bias current, the connecting input traces can be thinner, signal level traces. The traces should be one continuous piece of copper from the sense resistor pad to the LMP92064 input pin pad, and ideally on the same layer with minimal vias or connectors. This can be important around the sense resistor if it is generating any significant heat. To minimize noise pickup and thermal errors, the input traces should be treated as a signal pair and routed tightly together with a direct path to the input pins. The input traces should be run away from noise sources, such as digital lines, switching supplies or motor drive lines.

10.2 Layout Example

rec_layout_noscx0.gifFigure 29. Layout Schematic