SLOS263Y august 1999 – august 2023 LMV321 , LMV324 , LMV358
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
Figure 5-1 D, DDU, DGK, and PW Packages, 8-Pin SOIC,
VSSOP, and TSSOP (Top View)| PIN | TYPE(1) | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| 1IN+ | 3 | I | Noninverting input |
| 1IN– | 2 | I | Inverting input |
| 2IN+ | 5 | I | Noninverting input |
| 2IN– | 6 | I | Inverting input |
| 2OUT | 7 | O | Output |
| GND | 4 | — | Negative supply |
| OUT | 1 | O | Output |
| VCC+ | 8 | — | Positive supply |
Figure 5-2 DBV and DCK Packages, 5-Pin
SOT-23 and SC-70 (Top View)| PIN | TYPE(1) | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| 1IN+ | 1 | I | Noninverting input |
| 1IN– | 3 | I | Inverting input |
| GND | 2 | — | Negative supply |
| OUT | 4 | O | Output |
| VCC+ | 5 | — | Positive supply |
Figure 5-3 D and PW Packages, 14-Pin SOIC
and TSSOP (Top View)| PIN | TYPE(1) | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| 3/4 SHDN | — | I | Shutdown (logic low ) / enable (logic high) |
| 1/2 SHDN | — | I | Shutdown (logic low) / enable (logic high) |
| 1IN+ | 3 | I | Noninverting input |
| 1IN– | 2 | I | Inverting input |
| 2IN+ | 5 | I | Noninverting input |
| 2IN– | 6 | I | Inverting input |
| 2OUT | 7 | O | Output |
| 3IN+ | 10 | I | Noninverting input |
| 3IN– | 9 | I | Inverting input |
| 3OUT | 8 | O | Output |
| 4IN+ | 12 | I | Noninverting input |
| 4IN– | 13 | I | Inverting input |
| 4OUT | 14 | O | Output |
| GND | 11 | — | Negative supply |
| OUT | 1 | O | OUT |
| VCC+ | 4 | — | Positive supply |