SNOSAZ6C August   2008  – November 2015 LMV831 , LMV832 , LMV834


  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics, 3.3 V
    6. 6.6 Electrical Characteristics, 5 V
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Characteristics
      2. 7.3.2 EMIRR
      3. 7.3.3 EMIRR Definition
        1. Coupling an RF Signal to the IN+ Pin
        2. Cell Phone Call
    4. 7.4 Device Functional Modes
      1. 7.4.1 Output Characteristics
      2. 7.4.2 CMRR Measurement
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

CMRR Measurement

The CMRR measurement results may need some clarification. This is because different set-ups are used to measure the AC CMRR and the DC CMRR.

The DC CMRR is derived from ΔVOS versus ΔVCM. This value is stated in the tables, and is tested during production testing. The AC CMRR is measured with the test circuit shown in Figure 47.

LMV831 LMV832 LMV834 30024164.gifFigure 47. AC CMRR Measurement Set-Up

The configuration is largely the usually applied balanced configuration. With potentiometer P1, the balance can be tuned to compensate for the DC offset in the DUT. The main difference is the addition of the buffer. This buffer prevents the open-loop output impedance of the DUT from affecting the balance of the feedback network. Now the closed-loop output impedance of the buffer is a part of the balance. As the closed-loop output impedance is much lower, and by careful selection of the buffer also has a larger bandwidth, the total effect is that the CMRR of the DUT can be measured much more accurately. The differences are apparent in the larger measured bandwidth of the AC CMRR.

One artifact from this test circuit is that the low frequency CMRR results appear higher than expected. This is because in the AC CMRR test circuit the potentiometer is used to compensate for the DC mismatches. So, mainly AC mismatch is all that remains. Therefore, the obtained DC CMRR from this AC CMRR test circuit tends to be higher than the actual DC CMRR based on DC measurements.

The CMRR curve in Figure 48 shows a combination of the AC CMRR and the DC CMRR.

LMV831 LMV832 LMV834 30024136.gifFigure 48. CMRR Curve