SNOS510Q November   1999  – October 2016 LP2985LV-N

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Multiple Voltage Options
      2. 7.3.2 Output Voltage Accuracy
      3. 7.3.3 Ultra-Low-Dropout Voltage
      4. 7.3.4 Low Ground Current
      5. 7.3.5 Sleep Mode
      6. 7.3.6 Internal Protection Circuitry
        1. 7.3.6.1 Short Circuit Protection (Current Limit)
        2. 7.3.6.2 Thermal Protection
      7. 7.3.7 Enhanced Stability
      8. 7.3.8 Low Noise
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation with VOUT(TARGET) + 0.6 V ≥ VIN > 16 V
      2. 7.4.2 Operation With ON/OFF Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
          1. 8.2.2.1.1 Input Capacitor
          2. 8.2.2.1.2 Output Capacitor
          3. 8.2.2.1.3 Noise Bypass Capacitor
        2. 8.2.2.2 Capacitor Characteristics
          1. 8.2.2.2.1 Tantalum
        3. 8.2.2.3 On/OFF Input Operation
        4. 8.2.2.4 Reverse Input-Output Voltage
        5. 8.2.2.5 Power Dissipation
        6. 8.2.2.6 Estimating Junction Temperature
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 DSBGA Mounting
    4. 10.4 DSBGA Light Sensitivity
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
      2. 11.1.2 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from P Revision (April 2013) to Q Revision

  • Added Device Information and Pin Configuration and Functions sections, ESD Ratings and Thermal Information tables, Feature Description, Device Functional Modes, Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable Information sections; change pin names in text and app circuit drawing "VOUT" and "VIN" to "OUT" and "IN" Go
  • Deleted lead temperature spec per new TI documentation guidelines Go
  • Changed value of RθJA for the SOT-23 package is 220°C/W ..." to "...value of RθJA for the SOT-23 package is 175.7°C/W..." in footnote 3 to Abs Max table - see update thermal info for SOT-23 in Thermal Information; add RθJA values to footnote 3 to Abs MaxGo
  • Added Power Dissipation and Estimating Junction Temperature subsections Go

Changes from O Revision (April 2013) to P Revision

  • Changed layout of National Semiconductor data sheet to TI format Go