SNVS137I March   1999  – September 2015 LP2986

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Function
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 High-Accuracy Output Voltage
      2. 7.3.2 Error Detection Comparator Output
      3. 7.3.3 Thermal Protection
      4. 7.3.4 Short-Circuit Protection (Current Limit)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Fixed or Adjustable Regulated Output
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Using an External Resistive Divider
        2. 8.2.2.2 External Capacitors
          1. 8.2.2.2.1 Input Capacitor
          2. 8.2.2.2.2 Output Capacitor
        3. 8.2.2.3 Capacitor Characteristics
          1. 8.2.2.3.1 Tantalum
          2. 8.2.2.3.2 Ceramic
          3. 8.2.2.3.3 Aluminum
        4. 8.2.2.4 Reverse Input-Output Voltage
        5. 8.2.2.5 WSON Package Devices
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 WSON Mounting
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

For best overall performance, place all circuit components on the same side of the circuit board and as near as practical to the respective LDO pin connections. Place ground return connections to the input and output capacitor, and to the LDO ground pin as close to each other as possible, connected by a wide, component-side, copper surface. The use of vias and long traces to create LDO circuit connections is strongly discouraged and negatively affects system performance. This grounding and layout scheme minimizes inductive parasitics, and thereby reduces load-current transients, minimizes noise, and increases circuit stability. A ground reference plane is also recommended and is either embedded in the PCB itself or located on the bottom side of the PCB opposite the components. This reference plane serves to assure accuracy of the output voltage, shield noise, and behaves similar to a thermal plane to spread (or sink) heat from the LDO device. In most applications, this ground plane is necessary to meet thermal requirements.

10.2 Layout Examples

LP2986 internal_resistordivider_WSONlayout.gif Figure 39. WSON Layout with Internal Resistor Divider
LP2986 external_resistor_divider_WSONlayout.gif Figure 40. WSON Layout with External Resistor Divider

10.3 WSON Mounting

The LDC08A (pullback) 8-pin WSON package requires specific mounting techniques which are detailed in Texas Instruments Application Note Leadless Leadframe Package (LLP) (SNOA401). Referring to the section PCB Design Recommendations in SNOA401, the pad style which should be used with this WSON package is the NSMD (non-solder mask defined) type. Additionally, for optimal reliability, there is a recommended 1:1 ratio between the package pad and the PCB pad for the pullback WSON.

The thermal dissipation of the WSON package is directly related to the printed circuit board construction and the amount of additional copper area connected to the DAP.

The DAP (exposed pad) on the bottom of the WSON package is connected to the die substrate with a conductive die attach adhesive. The DAP has no direct electrical (wire) connection to any of the eight pins. There is a parasitic PN junction between the die substrate and the device ground. As such, it is strongly recommend that the DAP be connected directly to the ground at device pin 1 (GROUND). Alternately, but not recommended, the DAP may be left floating (that is, no electrical connection). The DAP must not be connected to any potential other than ground.

For the LP2986 in the NGN 8-pin WSON package, the junction-to-case thermal rating (RθJC) is 4.4°C/W, where the case is on the bottom of the package at the center of the DAP.