SNVS159H October   2001  – July 2015 LP3981

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 On/Off Input Operation
      2. 8.3.2 Fast On-Time
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation with VOUT(TARGET) + 0.3 V ≤ VIN ≤ 6 V
      2. 8.4.2 Operation With EN Control
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Dissipation and Device Operation
        2. 9.2.2.2 External Capacitors
        3. 9.2.2.3 Input Capacitor
        4. 9.2.2.4 Output Capacitor
        5. 9.2.2.5 No-Load Stability
        6. 9.2.2.6 Noise Bypass Capacitor
        7. 9.2.2.7 Capacitor Characteristics
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Parameter Measurement Information

LP3981 20020308.pngFigure 15. Line Transient Response Input Perturbation
LP3981 20020309.pngFigure 16. PSRR Input Perturbation