SNVSCC4 October   2023 LP5811

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
  9. 8 Typical Characteristics
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Synchronous Boost Converter
        1. 9.3.1.1 Undervoltage Lockout
        2. 9.3.1.2 Enable and Soft Start
        3. 9.3.1.3 Switching Frequency
        4. 9.3.1.4 Current Limit Operation
        5. 9.3.1.5 Boost PWM Mode
        6. 9.3.1.6 Boost PFM Mode
      2. 9.3.2 Analog Dimming
      3. 9.3.3 PWM Dimming
      4. 9.3.4 Autonomous Animation Engine Control
        1. 9.3.4.1 Animation Engine Pattern
        2. 9.3.4.2 Sloper
        3. 9.3.4.3 Animation Engine Unit (AEU)
        4. 9.3.4.4 Animation Pause Unit (APU)
      5. 9.3.5 Protections and Diagnostics
        1. 9.3.5.1 Overvoltage Protection
        2. 9.3.5.2 Output Short-to-Ground Protection
        3. 9.3.5.3 LED Open Detections
        4. 9.3.5.4 LED Short Detections
        5. 9.3.5.5 Thermal Shutdown
    4. 9.4 Device Functional Modes
    5. 9.5 Programming
    6. 9.6 Register Maps
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Application
      2. 10.2.2 Design Parameters
      3. 10.2.3 Detailed Design Procedure
        1. 10.2.3.1 Inductor Selection
        2. 10.2.3.2 Output Capacitor Selection
        3. 10.2.3.3 Input Capacitor Selection
        4. 10.2.3.4 Program Procedure
        5. 10.2.3.5 Programming Example
      4. 10.2.4 Application Performance Plots
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.3.2 Output Capacitor Selection

The output capacitor is selected to meet the requirements of output ripple and loop stability. The ripple voltage is related to capacitor capacitance and equivalent series resistance (ESR). Assuming a ceramic capacitor with zero ESR, the minimum capacitance for a given ripple voltage can be calculated by Equation 9.

Equation 9. COUT=IOUT×DMAXfSW×VRIPPLE

where

  • DMAX is the maximum switching duty cycle
  • VRIPPLE is the peak-to-peak output ripple voltage
  • IOUT is the maximum output current
  • fSW is the switching frequency

The ESR impact on the output ripple must be considered if tantalum or aluminum electrolytic capacitors are used. The output peak-to-peak ripple voltage caused by the ESR of the output capacitors can be calculated by Equation 10.

Equation 10. VRIPPLEESR=ILP×RESR

The derating of a ceramic capacitor under dc bias voltage, aging, and ac signal need to be considered during design. For example, the dc bias voltage can significantly reduce capacitance. A ceramic capacitor can lose more than 50% of capacitance at the rated voltage. Therefore, enough the voltage rating margin must be left to get adequate capacitance at the required output voltage. Increasing the output capacitor can make the output ripple voltage smaller in PWM mode.

TI recommends using the X5R or X7R ceramic output capacitor in the range of 4 μF to 1000 μF effective capacitance. 10 μF effective capacitance is recommended in typical application, which means around 22 μF rated capacitance. If the output capacitor is below the range, the boost regulator can potentially become unstable.