SNVS798P April   2012  – January 2024 LP5907

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Output and Input Capacitors
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Enable (EN)
      2. 6.3.2 Low Output Noise
      3. 6.3.3 Output Automatic Discharge
      4. 6.3.4 Remote Output Capacitor Placement
      5. 6.3.5 Thermal Overload Protection (TSD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Enable (EN)
      2. 6.4.2 Minimum Operating Input Voltage (VIN)
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Custom Design With WEBENCH® Tools
        2. 7.2.2.2 Power Dissipation and Device Operation
        3. 7.2.2.3 External Capacitors
        4. 7.2.2.4 Input Capacitor
        5. 7.2.2.5 Output Capacitor
        6. 7.2.2.6 Capacitor Characteristics
        7. 7.2.2.7 Remote Capacitor Operation
        8. 7.2.2.8 No-Load Stability
        9. 7.2.2.9 Enable Control
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 X2SON Mounting
        2. 7.4.1.2 DSBGA Mounting
        3. 7.4.1.3 DSBGA Light Sensitivity
      2. 7.4.2 Layout Examples
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Custom Design With WEBENCH® Tools
      2. 8.1.2 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YKM|4
  • DBV|5
  • DQN|4
  • YKG|4
  • YKE|4
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Power Dissipation and Device Operation

The permissible power dissipation for any package is a measure of the capability of the device to pass heat from the power source, the junctions of the device, to the ultimate heat sink, the ambient environment. Thus, the power dissipation is dependent on the ambient temperature and the thermal resistance across the various interfaces between the die junction and ambient air.

The maximum allowable power dissipation for the device in a given package can be calculated using Equation 1:

Equation 1. PD-MAX = ((TJ-MAX – TA) / RθJA)

The actual power being dissipated in the device can be represented by Equation 2:

Equation 2. PD = (VIN – VOUT) × IOUT

These two equations establish the relationship between the maximum power dissipation allowed in regards to thermal consideration, the voltage drop across the device, and the continuous current capability of the device. Use these two equations to determine the optimum operating conditions for the device in the application.

In applications where lower power dissipation (PD) or excellent package thermal resistance (RθJA) is present, the maximum ambient temperature (TA-MAX) can be increased.

In applications where high power dissipation or poor package thermal resistance is present, the maximum ambient temperature (TA-MAX) can be derated. TA-MAX is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum allowable power dissipation in the device package in the application (PD-MAX), and the junction-to ambient thermal resistance of the device or package in the application (RθJA), as given by Equation 3:

Equation 3. TA-MAX = (TJ-MAX-OP – (RθJA × PD-MAX))

Alternately, if TA-MAX cannot be derated, the PD value must be reduced. This reduction can be accomplished by reducing VIN in the VIN–VOUT term as long as the minimum VIN is met, or by reducing the IOUT term, or by some combination of the two.