SNVSC57 September   2022 LP5912-EP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Output and Input Capacitors
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable (EN)
      2. 7.3.2 Output Automatic Discharge (RAD)
      3. 7.3.3 Reverse Current Protection (IRO)
      4. 7.3.4 Internal Current Limit (ISC)
      5. 7.3.5 Thermal Overload Protection (TSD)
      6. 7.3.6 Power-Good Output (PG)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable (EN)
      2. 7.4.2 Minimum Operating Input Voltage (VIN)
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
        2. 8.2.2.2 Input Capacitor
        3. 8.2.2.3 Output Capacitor
        4. 8.2.2.4 Capacitor Characteristics
        5. 8.2.2.5 Remote Capacitor Operation
        6. 8.2.2.6 Power Dissipation
        7. 8.2.2.7 Estimating Junction Temperature
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
  10. 10Electrostatic Discharge Caution
  11. 11Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.3 Reverse Current Protection (IRO)

The LP5912-EP input is protected against reverse current when the output voltage is higher than the input voltage. In the event that extra output capacitance is used at the output, a power-down transient at the input normally causes a large reverse current through a conventional regulator. The LP5912-EP includes a reverse voltage detector that trips when VIN drops below VOUT, shutting off the regulator and opening the p-channel metal-oxide-semiconductor field effect transistor (PMOS) body diode connection, preventing any reverse current from the OUT pin from flowing to the IN pin.

If the LP5912-EP EN pin is low (the LP5912-EP is off) and the OUT pin is held high by a secondary supply, current flows from the secondary supply through the automatic discharge pulldown resistor to ground. This scenario is not reverse current, but is instead automatic discharge pulldown current.

Reverse current (IRO) is measured at the IN pin.