SDLS972B April   2023  – April 2024 LSF0102

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  LSF0102 AC Performance (Translating Down) Switching Characteristics , VCCB = 3.3V
    7. 5.7  LSF0102 AC Performance (Translating Down) Switching Characteristics, VCCB = 2.5V
    8. 5.8  LSF0102 AC Performance (Translating Up) Switching Characteristics, VCCB = 3.3V
    9. 5.9  LSF0102 AC Performance (Translating Up) Switching Characteristics, VCCB = 2.5V
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Auto Bidirectional Voltage Translation
      2. 7.3.2 Output Enable
    4. 7.4 Device Functional Modes
      1. 7.4.1 Up and Down Translation
        1. 7.4.1.1 Up Translation
        2. 7.4.1.2 Down Translation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Open-Drain Interface (I2C, PMBus, SMBus, and GPIO)
        1. 8.2.1.1 Design Requirements
          1. 8.2.1.1.1 Enable, Disable, and Reference Voltage Guidelines
          2. 8.2.1.1.2 Bias Circuitry
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Bidirectional Translation
          2. 8.2.1.2.2 Pull-Up Resistor Sizing
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Mixed-Mode Voltage Translation
      3. 8.2.3 Single Supply Translation
      4. 8.2.4 Voltage Translation for Vref_B < Vref_A + 0.8V
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information
  12. 11Revision History

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DCU|8
  • DDF|8
  • DTM|8
  • YZT|8
  • DCT|8
  • DQE|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIK II = –18mA, VEN = 0 –1.2 V
IIH VI = 5V VEN = 0 5.0 µA
ICC Vref_B = VEN = 5.5V, Vref_A = 4.5V, IO = 0, VI = VCC or GND

6

 µA
CI(ref_A/B/EN) VI = 3V or 0 11 pF
Cio(off) VO = 3V or 0, VEN = 0 4.0 6.0 pF
Cio(on) VO = 3V or 0, VEN = 3V 10.5 12.5 pF
ron(2) VI = 0, IO = 64mA Vref_A = 3.3V; Vref_B = VEN = 5V 8.0 Ω
Vref_A = 1.8V; Vref_B = VEN = 5V 9.0
Vref_A = 1.0V; Vref_B = VEN = 5V 10
VI = 0, IO = 32mA Vref_A = 1.8V; Vref_B = VEN = 5V 10 Ω
Vref_A = 2.5V; Vref_B = VEN = 5V 15
VI = 1.8V, IO = 15mA Vref_A = 3.3V; Vref_B = VEN = 5V 9.0 Ω
VI = 1.0V, IO = 10mA Vref_A = 1.8V; Vref_B = VEN = 3.3V 18 Ω
VI = 0V, IO = 10mA Vref_A = 1.0V; Vref_B = VEN = 3.3V 20 Ω
VI = 0V, IO = 10mA Vref_A = 1.0V; Vref_B = VEN = 1.8V 30 Ω
(1) All typical values are at TA = 25°C.
(2) Measured by the voltage drop between the A and B pins at the indicated current through the switch. On-state resistance is determined by the lowest voltage of the two (A or B) pins.