SLVS033G February   1990  – July 2015 LT1054


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Reference and Error Amplifier for Regulation
      2. 7.3.2 External Oscillator Synchronization
      3. 7.3.3 Output Current and Voltage Loss
      4. 7.3.4 Reference Voltage
    4. 7.4 Device Functional Modes
      1. 7.4.1 Main Operation
      2. 7.4.2 Shutdown
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. Output Voltage Programming
        2. Capacitor Selection
        3. Output Ripple
        4. Power Dissipation
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • P|8
  • DW|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation


Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The negative voltage converting and regulating ability of the LT1054 make this device optimal across a wide range of applications. As it is a regulator, there are many general design considerations that must be taken into account. Below will describe what to consider for using this device as a basic voltage inverter/regulator. This is the most common application for the LT1054 and the fundamental building block for the applications shown in System Examples.

8.2 Typical Application

LT1054 basic_vltg_invrtr_rgltr_slvs033..gif
Pin numbers shown are for the P package.
Figure 15. Basic Voltage Inverter/Regulator

8.2.1 Design Requirements

For this design example, use the parameters listed in Table 2 as the input parameters.

Table 2. Design Parameters

Design Parameter Example Value
Input Voltage Range 3.5V to 15V
IOUT 100mA

8.2.2 Detailed Design Procedure

When using LT1054 as a basic voltage inverter, determine the following:

  • Input Voltage
  • Desired output Voltage
  • Desired Ripple
  • Power Dissipation Output Voltage Programming

The error amplifier of the LT1054 drives the PNP switch to control the voltage across the input capacitor (CIN), which determines the output voltage. When the reference and error amplifier of the LT1054 are used, an external resistive divider is all that is needed to set the regulated output voltage. shows the basic regulator configuration and the formula for calculating the appropriate resistor values. R1 should be 20 kΩ or greater because the reference current is limited to ±100 μA. R2 should be in the range of 100 kΩ to 300 kΩ. Capacitor Selection

While the exact values of CIN and COUT are noncritical, good-quality low-ESR capacitors, such as solid tantalum, are necessary to minimize voltage losses at high currents. For CIN, the effect of the ESR of the capacitor is multiplied by four, because switch currents are approximately two times higher than output current. Losses occur on both the charge and discharge cycle, which means that a capacitor with 1 Ω of ESR for CIN has the same effect as increasing the output impedance of the LT1054 by 4 Ω. This represents a significant increase in the voltage losses. COUT alternately is charged and discharged at a current approximately equal to the output current. The ESR of the capacitor causes a step function to occur in the output ripple at the switch transitions. This step function degrades the output regulation for changes in output load current and should be avoided. A technique used to gain both low ESR and reasonable cost is to parallel a smaller tantalum capacitor with a large aluminum electrolytic capacitor.

Frequency compensation is accomplished by adjusting the ratio of CIN to COUT.

For best results, this ratio should be approximately 1:10. Capacitor C1, required for good load regulation, should be 0.002 μF for all output voltages. Output Ripple

The peak-to-peak output ripple is determined by the output capacitor and the output current values. Peak-to-peak output ripple is approximated as:

Equation 4. LT1054 Eq01_delta-F5_slvs033.gif


  • ΔV = peak-to-peak ripple
  • fOSC = oscillator frequency

For output capacitors with significant ESR, a second term must be added to account for the voltage step at the switch transitions. This step is approximately equal to:

Equation 5. (2IOUT)(ESR of COUT) Power Dissipation

The power dissipation of any LT1054 circuit must be limited so that the junction temperature of the device does not exceed the maximum junction-temperature ratings. The total power dissipation is calculated from two components–the power loss due to voltage drops in the switches, and the power loss due to drive-current losses. The total power dissipated by the LT1054 is calculated as:

Equation 6. P = (VCC – VOUT ) IOUT + (VCC)(IOUT)(0.2)


  • both VCC and VOUT are referenced to ground

The power dissipation is equivalent to that of a linear regulator. Limited power-handling capability of the LT1054 packages causes limited output-current requirements, or steps can be taken to dissipate power external to the LT1054 for large input or output differentials. This is accomplished by placing a resistor in series with CIN as shown in Figure 16. A portion of the input voltage is dropped across this resistor without affecting the output regulation. Since switch current is approximately 2.2 times the output current and the resistor causes a voltage drop when CIN is both charging and discharging, the resistor chosen is as shown:

Equation 7. LT1054 Eq04_Rx-F8_slvs033.gif


  • VX ≈ VCC − [(LT1054 voltage loss)(1.3) + |VOUT|]
  • IOUT = maximum required output current

The factor of 1.3 allows some operating margin for the LT1054.

When using a 12-V to −5-V converter at 100-mA output current, calculate the power dissipation without an external resistor.

Equation 8. LT1054 Eq05_P-F9_slvs033.gif
LT1054 pwr_dssptn_lmit_rsstr_cin_slvs033.gif
Pin numbers shown are for the P package.
Figure 16. Power-Dissipation-Limiting Resistor in Series With CIN

At RθJA of 130°C/W for a commercial plastic device, a junction temperature rise of 122°C occurs. The device exceeds the maximum junction temperature at an ambient temperature of 25°C. To calculate the power dissipation with an external resistor (RX), determine how much voltage can be dropped across RX. The maximum voltage loss of the LT1054 in the standard regulator configuration at 100 mA output current is 1.6 V.

Equation 9. VX = 12 V – [(1.6 V)(1.3) + |–5 V|] = 4.9 V


Equation 10. LT1054 Eq07_Rx-F11_slvs033.gif

The resistor reduces the power dissipated by the LT1054 by (4.9 V)(100 mA) = 490 mW. The total power dissipated by the LT1054 is equal to (940 mW − 490 mW) = 450 mW. The junction-temperature rise is 58°C. Although commercial devices are functional up to a junction temperature of 125°C, the specifications are tested to a junction temperature of 100°C. In this example, this means limiting the ambient temperature to 42°C. To allow higher ambient temperatures, the thermal resistance numbers for the LT1054 packages represent worst-case numbers, with no heat sinking and still air. Small clip-on heat sinks can be used to lower the thermal resistance of the LT1054 package. Airflow in some systems helps to lower the thermal resistance. Wide printed circuit board traces from the LT1054 leads help remove heat from the device. This is especially true for plastic packages.

8.2.3 Application Curve

LT1054 typ_char_11_vl_v_oc_slvs033.gif
Figure 17. Voltage Loss vs Output Current

8.3 System Examples

LT1054 motor_spd_servo_slvs033.gif


Motor-Tach is Canon CKT26-T5-3SAE.
Pin numbers shown are for the P package.
Figure 18. Motor-Speed Servo
LT1054 nega_vltg_dblr_slvs033.gif
Pin numbers shown are for the P package.
Figure 19. Negative-Voltage Doubler
LT1054 posi_vltg_dblr_slvs033.gif
Pin numbers shown are for the P package.
Figure 20. Positive-Voltage Doubler
LT1054 100ma_reg_nega_dblr_slvs033.gif
Pin numbers shown are for the P package.
Figure 21. 100-mA Regulating Negative Doubler
LT1054 dual_output_vltg_dblr_slvs033.gif
Pin numbers shown are for the P package.
Figure 22. Dual-Output Voltage Doubler
LT1054 regulatng_200ma_12v_5v_cnvrtr_slvs033.gif
Pin numbers shown are for the P package.
Figure 23. 5-V to ±12-V Converter
LT1054 strain_gage_brdge_sgnl_cndtnr_slvs033.gif
Pin numbers shown are for the P package.
Figure 24. Strain-Gage Bridge Signal Conditioner
LT1054 3pt5v_5v_reg_slvs033.gif
Pin numbers shown are for the P package.
Figure 25. 3.5-V to 5-V Regulator
LT1054 regulatng_200ma_12v_5v_cnvrtr_slvs033.gif
Pin numbers shown are for the P package.
Figure 26. Regulating 200-mA +12-V to −5-V Converter
LT1054 digtally_prgrmmble_nega_spply_slvs033.gif
Pin numbers shown are for the P package.
Figure 27. Digitally Programmable Negative Supply
LT1054 postve_dblr_w_rgltn_5v_8v_slvs033.gif
Pin numbers shown are for the P package.
Figure 28. Positive Doubler With Regulation (5-V to 8-V Converter)
LT1054 nega_dblr_w_rgltr_slvs033.gif
Pin numbers shown are for the P package.
Figure 29. Negative Doubler With Regulator