SNVSAZ1A August 2017 – September 2020 LV14360
PRODUCTION DATA
The switching frequency of the LV14360 can be programmed by the resistor RT from the RT/SYNC pin and GND pin. The RT/SYNC pin cannot be left floating or shorted to ground. To determine the timing resistance for a given switching frequency, use Equation 5 or the curve in Figure 8-4. Table 8-1 gives typical RT values for a given ƒSW.
ƒSW (kHz) | RT (kΩ) |
---|---|
200 | 133 |
350 | 73.2 |
500 | 49.9 |
750 | 32.4 |
1000 | 23.2 |
1500 | 15.0 |
1912 | 11.5 |
2000 | 11 |
The LV14360 switching action can also be synchronized to an external clock from 250 kHz to 2 MHz. Connect a square wave to the RT/SYNC pin through either circuit network shown in Figure 8-5. Internal oscillator is synchronized by the falling edge of external clock. The recommendations for the external clock include: high level no lower than 1.7 V, low level no higher than 0.5 V, and have a pulse width greater than 30 ns. When using a low impedance signal source, the frequency setting resistor RT is connected in parallel with an AC coupling capacitor CCOUP to a termination resistor RTERM (for example, 50 Ω). The two resistors in series provide the default frequency setting resistance when the signal source is turned off. A 10-pF ceramic capacitor can be used for CCOUP. Figure 8-6, Figure 8-7, and Figure 8-8 show the device synchronized to an external system clock.
Equation 6 calculates the maximum switching frequency limitation set by the minimum controllable on time and the input to output step down ratio. Setting the switching frequency above this value will cause the regulator to skip switching pulses to achieve the low duty cycle required at maximum input voltage.
where