SNVSAZ1A August   2017  – September 2020 LV14360

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed Frequency Peak Current Mode Control
      2. 8.3.2  Slope Compensation
      3. 8.3.3  Sleep Mode
      4. 8.3.4  Low Dropout Operation and Bootstrap Voltage (BOOT)
      5. 8.3.5  Adjustable Output Voltage
      6. 8.3.6  Enable and Adjustable Undervoltage Lockout
      7. 8.3.7  External Soft Start
      8. 8.3.8  Switching Frequency and Synchronization (RT/SYNC)
      9. 8.3.9  Power Good (PGOOD)
      10. 8.3.10 Overcurrent and Short-Circuit Protection
      11. 8.3.11 Overvoltage Protection
      12. 8.3.12 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Active Mode
      3. 8.4.3 CCM Mode
      4. 8.4.4 Light Load Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Voltage Set-Point
        2. 9.2.2.2 Switching Frequency
        3. 9.2.2.3 Output Inductor Selection
        4. 9.2.2.4 Output Capacitor Selection
        5. 9.2.2.5 Schottky Diode Selection
        6. 9.2.2.6 Input Capacitor Selection
        7. 9.2.2.7 Bootstrap Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Glossary
    5. 12.5 Electrostatic Discharge Caution
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Functions

PINTYPE (1)DESCRIPTION
NO.NAME
1BOOTPBootstrap capacitor connection for high-side MOSFET driver. Connect a high quality 0.1-μF capacitor from BOOT to SW.
2VINPConnect to power supply and bypass capacitors CIN. Path from VIN pin to high frequency bypass CIN and GND must be as short as possible.
3ENAEnable pin with internal pullup current source. Pull below 1.2 V to disable. Float or connect to VIN to enable. Adjust the input undervoltage lockout with two resistors (see Section 8.3.6).
4RT/SYNCAResistor timing or external clock input. An internal amplifier holds this pin at a fixed voltage when using an external resistor to ground to set the switching frequency. If the pin is pulled above the PLL upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal amplifier is disabled and the pin is a high impedance clock input to the internal PLL. If clocking edges stop, the internal amplifier is re-enabled, and the operating mode returns to frequency programming by resistor.
5FBAFeedback input pin, connect to the feedback divider to set VOUT. Do not short this pin to ground during operation.
6SS
or
PGOOD		ASS pin for soft-start version, connect to a capacitor to set soft-start time.
The PGOOD pin for power-good version, open-drain output for power-good flag, use a 10-kΩ to 100-kΩ pullup resistor to logic rail or other DC voltage no higher than 7 V.
7GNDGSystem ground pin
8SWPSwitching output of the regulator. Internally connected to high-side power MOSFET. Connect to power inductor.
9Thermal PadGMajor heat dissipation path of the die. Must be connected to ground plane on PCB.
(1) A = Analog, P = Power, G = Ground