SLLS664E August   2005  – June 2021 MAX3232E

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  ESD Ratings - IEC Specifications
    4. 6.4  Recommended Operating Conditions (1)
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics — Device (1)
    7. 6.7  Electrical Characteristics — Driver (1)
    8. 6.8  Electrical Characteristics — Receiver (1)
    9. 6.9  Switching Characteristics (1)
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power
      2. 8.3.2 RS232 Driver
      3. 8.3.3 RS232 Receiver
    4. 8.4 Device Functional Modes
      1. 8.4.1 VCC Powered by 3 V to 5.5 V
      2. 8.4.2 VCC Unpowered, VCC = 0 V
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4 Device Functional Modes

Table 8-1 and Table 8-2 list the functional modes of the drivers and receivers of MAX3232E.

Table 8-1 Each Driver(1)
INPUT
DIN		OUTPUT
DOUT
LH
HL
(1) H = high level, L = low level
Table 8-2 Each Receiver(1)
INPUT
RIN		OUTPUT
ROUT
LH
HL
OpenH
(1) H = high level, L = low level,
Open = input disconnected or connected driver off
GUID-B9620C82-A4C1-49A0-854E-17DF4B8A30B1-low.gifFigure 8-1 Logic Diagram