SLVSJB5 November   2025 MSPM0G5187

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
    1. 5.1 Device Comparison Chart
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      11
    3. 6.3 Signal Descriptions
      1.      13
      2.      14
      3.      15
      4.      16
      5.      17
      6.      18
      7.      19
      8.      20
      9.      21
      10.      22
      11.      23
      12.      24
      13.      25
      14.      26
      15.      27
    4. 6.4 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 Power Supply Ramp
      2. 7.6.2 POR and BOR
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
      2. 7.9.2 Low Frequency Oscillator (LFOSC)
      3. 7.9.3 System Phase Lock Loop (SYSPLL)
      4. 7.9.4 USB Frequency Lock Loop (USBFLL)
      5. 7.9.5 Low Frequency Crystal/Clock
      6. 7.9.6 High Frequency Crystal/Clock
    10. 7.10 Digital IO
      1. 7.10.1  Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 Analog Mux VBOOST
    12. 7.12 ADC
      1. 7.12.1 Electrical Characteristics
      2. 7.12.2 Switching Characteristics
      3. 7.12.3 Linearity Parameters
      4. 7.12.4 Typical Connection Diagram
    13. 7.13 Temperature Sensor
    14. 7.14 VREF1
      1. 7.14.1 Voltage Characteristics (VREF1)
      2. 7.14.2 Electrical Characteristics (VREF1)
    15. 7.15 VREF2
      1. 7.15.1 Voltage Characteristics (VREF2)
      2. 7.15.2 Electrical Characteristics (VREF2)
    16. 7.16 Comparator (COMP)
      1. 7.16.1 Comparator Electrical Characteristics
    17. 7.17 I2C
      1. 7.17.1 I2C Characteristics
      2. 7.17.2 I2C Filter
      3. 7.17.3 I2C Timing Diagram
    18. 7.18 SPI
      1. 7.18.1 SPI
      2. 7.18.2 SPI Timing Diagram
    19. 7.19 UART
    20. 7.20 USB Specifications
      1. 7.20.1 USB Characteristics (USB mode)
    21. 7.21 Serial Audio
    22. 7.22 TIMx
    23. 7.23 Emulation and Debug
      1. 7.23.1 SWD Timing
  9. 8 Detailed Description
    1. 8.1  Functional Block Diagram
    2. 8.2  CPU
    3. 8.3  Operating Modes
      1. 8.3.1 Functionality by Operating Mode (MSPM0G5187)
    4. 8.4  Power Management Unit (PMU)
    5. 8.5  Clock Module (CKM)
    6. 8.6  DMA
    7. 8.7  Events
    8. 8.8  Memory
      1. 8.8.1 Memory Organization
      2. 8.8.2 Peripheral File Map
      3. 8.8.3 Peripheral Interrupt Vector
    9. 8.9  Flash Memory
    10. 8.10 SRAM
    11. 8.11 GPIO
    12. 8.12 IOMUX
    13. 8.13 ADC
    14. 8.14 Temperature Sensor
    15. 8.15 VREF
    16. 8.16 COMP
    17. 8.17 Security
    18. 8.18 AESADV
    19. 8.19 Keystore
    20. 8.20 CRC-P
    21. 8.21 Edge AI NPU
    22. 8.22 Serial Communication Interfaces
      1. 8.22.1 UNICOMM (UART/I2C/SPI)
        1. 8.22.1.1 UART (UNICOMM)
        2. 8.22.1.2 I2C (UNICOMM)
        3. 8.22.1.3 SPI (UNICOMM)
      2. 8.22.2 Universal Serial Bus (USB)
      3. 8.22.3 Digital Audio Interface - I2S/TDM
    23. 8.23 Low-Frequency Sub System (LFSS)
    24. 8.24 RTC_B
    25. 8.25 IWDT_B
    26. 8.26 WWDT
    27. 8.27 Timers (TIMx)
    28. 8.28 Device Analog Connections
    29. 8.29 Input/Output Diagrams
    30. 8.30 Serial Wire Debug Interface
    31. 8.31 Boot Strap Loader (BSL)
    32. 8.32 Device Factory Constants
    33. 8.33 Identification
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.10.1  Electrical Characteristics

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIH High level input voltage ODIO (1) VDD≥1.62V 0.7*VDD 5.5 V
VDD≥2.7V 2 5.5 V
USBIO GPIO mode
VUSB33≥1.62V		 0.7*VUSB33 VUSB33+0.3 V
All I/O except ODIO & Reset VDD≥1.62V 0.7*VDD VDD+0.3 V
VIL Low level input voltage ODIO VDD≥1.62V -0.3 0.3*VDD V
VDD≥2.7V -0.3 0.8 V
USBIO GPIO mode
VUSB33≥1.62V		 -0.3 0.3*VUSB33 V
All I/O except ODIO & Reset VDD≥1.62V -0.3 0.3*VDD V
VHYS Hysteresis ODIO 0.05*VDD V
USBIO GPIO mode
VUSB33≥1.62V		 0.1*VUSB33 V
All I/O except ODIO 0.1*VDD V
Ilkg High-Z leakage current (All packages except PM) SDIO(2)(3) 1.62V ≤ VDD ≤ 3.6V, -40 °C ≤ Ta ≤ 125 °C 50(4) nA
High-Z leakage current (PM package) SDIO(2)(3) 1.62V ≤ VDD ≤ 3.6V, -40 °C ≤ Ta ≤ 25 °C 70(4) nA
1.62V ≤ VDD ≤ 3.6V, -40 °C ≤ Ta ≤ 125 °C 400(4) nA
RPU Pull up resistance All I/O except ODIO and USBIO VIN = VSS 40 kΩ
USBIO GPIO mode
IN = VSS		 33
RPD Pull down resistance All I/O except USBIO VIN = VDD 40 kΩ
USBIO GPIO mode
VIN = VUSB33		 14
CI Input capacitance VDD = 3.3V 5 pF
VOH High level output voltage SDIO VDD≥2.7V, |IIO|,max=6mA
VDD≥1.71V, |IIO|,max=2mA
VDD≥1.62V, |IIO|,max=1.5mA
-40 °C ≤ Ta ≤ 25 °C		 VDD-0.4 V
VDD≥2.7V, |IIO|,max=6mA
VDD≥1.71V, |IIO|,max=2mA
VDD≥1.62V, |IIO|,max=1.5mA
-40 °C ≤ Ta ≤ 125 °C		 VDD-0.45
HSIO VDD≥2.7V, DRV=1, |IIO|,max=6mA
VDD≥1.71V, DRV=1, |IIO|,max=3mA
VDD≥1.62V, DRV=1, |IIO|,max=2mA
-40 °C ≤ Ta ≤ 25 °C		 VDD-0.4
VDD≥2.7V, DRV=1, |IIO|,max=6mA
VDD≥1.71V, DRV=1, |IIO|,max=3mA
VDD≥1.62V, DRV=1, |IIO|,max=2mA
-40 °C ≤ Ta ≤ 125 °C		 VDD-0.45
VDD≥2.7V, DRV=0, |IIO|,max=4mA
VDD≥1.71V, DRV=0, |IIO|,max=2mA
VDD≥1.62V, DRV=0, |IIO|,max=1.5mA
-40 °C ≤ Ta ≤ 25 °C		 VDD-0.4
VDD≥2.7V, DRV=0, |IIO|,max=4mA
VDD≥1.71V, DRV=0, |IIO|,max=2mA
VDD≥1.62V, DRV=0, |IIO|,max=1.5mA
-40 °C ≤ Ta ≤ 125 °C		 VDD-0.45
HDIO VDD≥2.7V, DRV=1(5), |IIO|,max=20mA
VDD≥1.71V, DRV=1(5), |IIO|,max=10mA		 VDD-0.4
VDD≥2.7V, DRV=0, |IIO|,max=6mA
VDD≥1.71V, DRV=0, |IIO|,max=2mA		 VDD-0.4
USBIO GPIO mode
VUSB33≥2.7V, |IIO|,max=4mA
VUSB33≥1.71V, |IIO|,max=2mA
VUSB33≥1.62V, |IIO|,max=1.5mA		 0.8*VUSB33
VOL Low level output voltage SDIO VDD≥2.7V, |IIO|,max=6mA
VDD≥1.71V, |IIO|,max=2mA
VDD≥1.62V, |IIO|,max=1.5mA
-40 °C ≤ Ta ≤ 25 °C		 0.4 V
VDD≥2.7V, |IIO|,max=6mA
VDD≥1.71V, |IIO|,max=2mA
VDD≥1.62V, |IIO|,max=1.5mA
-40 °C ≤ Ta ≤ 125 °C		 0.45
HSIO VDD≥2.7V, DRV=1, |IIO|,max=6mA
VDD≥1.71V, DRV=1, |IIO|,max=3mA
VDD≥1.62V, DRV=1, |IIO|,max=2mA
-40 °C ≤ Ta ≤ 25 °C		 0.4
VDD≥2.7V, DRV=1, |IIO|,max=6mA
VDD≥1.71V, DRV=1, |IIO|,max=3mA
VDD≥1.62V, DRV=1, |IIO|,max=2mA
-40 °C ≤ Ta ≤ 125 °C		 0.45
VDD≥2.7V, DRV=0, |IIO|,max=4mA
VDD≥1.71V, DRV=0, |IIO|,max=2mA
VDD≥1.62V, DRV=0, |IIO|,max=1.5mA
-40 °C ≤ Ta ≤ 25 °C		 0.4
VDD≥2.7V, DRV=0, |IIO|,max=4mA
VDD≥1.71V, DRV=0, |IIO|,max=2mA
VDD≥1.62V, DRV=0, |IIO|,max=1.5mA
-40 °C ≤ Ta ≤ 125 °C		 0.45
HDIO VDD≥2.7V, DRV=1(5), |IIO|,max=20mA
VDD≥1.71V, DRV=1(5), |IIO|,max=10mA		 0.4
VDD≥2.7V, DRV=0, |IIO|,max=6mA
VDD≥1.71V, DRV=0, |IIO|,max=2mA		 0.4
USBIO GPIO mode
VUSB33≥2.7V, |IIO|,max=4mA
VUSB33≥1.71V, |IIO|,max=2mA
VUSB33≥1.62V, |IIO|,max=1.5mA 		0.2*VUSB33

ODIO

 VDD≥2.7V, IOL,max=8mA
VDD≥1.71V, IOL,max=4mA
-40 °C ≤ Ta ≤ 25 °C		 0.4
VDD≥2.7V, IOL,max=8mA
VDD≥1.71V, IOL,max=4mA
-40 °C ≤ Ta ≤ 125 °C		 0.45
(1) I/O Types: ODIO = 5V Tolerant Open-Drain , SDIO = Standard-Drive , HSIO = High-Speed, HDIO = High-Drive, USBIO = USB
(2) The leakage current is measured with VSS or VDD applied to the corresponding pin(s), unless otherwise noted.
(3) The leakage of the digital port pins is measured individually. The port pin is selected for input and the pullup/pulldown resistor is disabled.
(4) This value is for SDIO not muxed with any analog inputs. If the SDIO is muxed with analog inputs then the leakage can be higher. 
(5) When operating a HDIO in DRV=1 high drive strength configuration, a series resistor is necessary to limit the signal slew rate