SLLSEK1B July 2014 – March 2018 ONET2804T
A simplified block diagram of one channel of the ONET2804T is shown in Functional Block Diagram.
The ONET2804T consists of the signal path, supply filters, a control block for DC input bias, automatic gain control (AGC) and received signal strength indication (RSSI), an analog reference block and a 2-wire serial interface and control logic block.
The signal path consists of a transimpedance amplifier stage, a voltage amplifier, and a CML output buffer. The on-chip filter circuit provides a filtered VCC for the PIN photodiode and for the transimpedance amplifier. The RSSI provides the bias for the TIA stage and the control for the AGC.
The DC input bias circuit and automatic gain control use internal low pass filters to cancel the DC current on the input and to adjust the transimpedance amplifier gain. Furthermore, circuitry is provided to monitor the received signal strength.
The output amplitude, gain, bandwidth and input threshold can be globally controlled through pin settings or each channel can be individually controlled through the 2-wire interface.