SBOS936E November   2019  – August 2022 OPA182 , OPA2182 , OPA4182

PRODMIX  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: OPA182
    5. 7.5 Thermal Information: OPA2182
    6. 7.6 Thermal Information: OPA4182
    7. 7.7 Electrical Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Phase-Reversal Protection
      2. 8.3.2 Input Bias Current Clock Feedthrough
      3. 8.3.3 EMI Rejection
      4. 8.3.4 Electrical Overstress
      5. 8.3.5 MUX-Friendly Inputs
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Strain Gauge Analog Linearization
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Rogowski Coil Integrator
      3. 9.2.3 System Examples
        1. 9.2.3.1 24-Bit, Delta-Sigma, Differential Load Cell or Strain Gauge Sensor Signal Conditioning
      4. 9.2.4 Programmable Power Supply
      5. 9.2.5 RTD Amplifier With Linearization
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 PSpice® for TI
        2. 10.1.1.2 TINA-TI™ Simulation Software (Free Download)
        3. 10.1.1.3 TI Reference Designs
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.8 Typical Characteristics

at TA = 25°C, VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)

Table 7-1 Typical Characteristic Graphs
DESCRIPTIONFIGURE
Offset Voltage Production DistributionFigure 7-1
Offset Voltage Drift Distribution From –40°C to 125°CFigure 7-2
Input Bias Current Production DistributionFigure 7-3
Input Offset Current Production DistributionFigure 7-4
Offset Voltage vs TemperatureFigure 7-5
Offset Voltage vs Common-Mode VoltageFigure 7-6
Offset Voltage vs Supply VoltageFigure 7-7
Open-Loop Gain and Phase vs FrequencyFigure 7-8
Closed-Loop Gain vs FrequencyFigure 7-9
Input Bias Current vs Common-Mode VoltageFigure 7-10
Input Bias Current and Offset vs TemperatureFigure 7-11
Output Voltage Swing vs Output Current (Sourcing)Figure 7-12
Output Voltage Swing vs Output Current (Sinking)Figure 7-13
CMRR and PSRR vs FrequencyFigure 7-14
CMRR vs TemperatureFigure 7-15
PSRR vs TemperatureFigure 7-16
0.1-Hz to 10-Hz Voltage NoiseFigure 7-17
Input Voltage Noise Spectral Density vs FrequencyFigure 7-18
THD+N Ratio vs FrequencyFigure 7-19
THD+N vs Output AmplitudeFigure 7-20
Quiescent Current vs Supply VoltageFigure 7-21
Quiescent Current vs TemperatureFigure 7-22
Open-Loop Gain vs Temperature (10-kΩ)Figure 7-23
Open-Loop Output Impedance vs FrequencyFigure 7-24
Small-Signal Overshoot vs Capacitive Load (10-mV Step)Figure 7-25, Figure 7-26
No Phase ReversalFigure 7-27
Positive Overload RecoveryFigure 7-28
Negative Overload RecoveryFigure 7-29
Small-Signal Step Response (10-mV Step)Figure 7-30, Figure 7-31
Large-Signal Step Response (10-V Step)Figure 7-32, Figure 7-33
Settling TimeFigure 7-34
Short Circuit Current vs TemperatureFigure 7-35
Maximum Output Voltage vs FrequencyFigure 7-36
EMIRR vs FrequencyFigure 7-37
Channel SeparationFigure 7-38
GUID-0BEA2FFF-68E4-47F5-AEFF-928EB1BECD64-low.gif
 
Figure 7-1 Offset Voltage Production Distribution
GUID-6569FFA6-7E06-48E5-BDF1-728FE50E8A01-low.gif
 
Figure 7-3 Input Bias Current Production Distribution
GUID-46C3A2D8-331A-4360-BA4A-A682F007B9F4-low.gif
 
Figure 7-5 Offset Voltage vs Temperature
GUID-6B822502-040B-4EE5-AE63-CC1690862020-low.gif
 
Figure 7-7 Offset Voltage vs Supply Voltage
GUID-3AE67713-DCBF-4165-BEBE-33B7E7ADB2B4-low.gif
 
Figure 7-9 Closed-Loop Gain vs Frequency
GUID-7BA45C4E-97F4-4304-9BF1-D50ED75103F9-low.gif
 
Figure 7-11 Input Bias Current and Offset vs Temperature
GUID-C038AC63-F0B4-45CC-90AE-6AC89B80E312-low.gif
 
Figure 7-13 Output Voltage Swing vs Output Current (Sinking)
GUID-3493825D-94D3-4172-B0E1-03372E2D8BC2-low.gif
 
Figure 7-15 CMRR vs Temperature
GUID-7893AE5C-21CF-4EFA-99CF-91E345161BEA-low.gif
 
Figure 7-17 0.1-Hz to 10-Hz Voltage Noise
GUID-D968C4D7-32BC-4AC4-B38D-DBFF721902BB-low.gif
 
Figure 7-19 THD+N Ratio vs Frequency
GUID-F8CB0CB4-1DA6-495C-8EBD-B80D42F0360C-low.gif
 
Figure 7-21 Quiescent Current vs Supply Voltage
GUID-DE6962F9-7ECD-400E-9B51-E7FD8E981ECB-low.gif
 
Figure 7-23 Open-Loop Gain vs Temperature (10-kΩ)
GUID-0C826C39-CADA-4AAD-A8ED-1C1150F9B76D-low.gif
Inverting Configuration
Figure 7-25 Small-Signal Overshoot vs Capacitive Load
GUID-57DE5143-D81F-4337-B071-433DF30609D9-low.gif
 
Figure 7-27 No Phase Reversal
GUID-E699C7C9-68D8-49E6-A07E-13BF10F63736-low.gif
 
Figure 7-29 Negative Overload Recovery
GUID-6A8BA5A9-4DE4-4F0B-93E1-2A30B3A660BB-low.gif
Noninverting Configuration
Figure 7-31 Small-Signal Step Response
GUID-5188C9BA-06F7-44AD-9121-C51B69F9FD75-low.gif
Noninverting Configuration
Figure 7-33 Large-Signal Step Response
GUID-A0C6E442-D708-42C3-BB26-4439AA32BE53-low.gif
 
Figure 7-35 Short-Circuit Current vs Temperature
GUID-FF676342-19D9-45C8-B568-5948731687A6-low.gif
 
Figure 7-37 EMIRR vs Frequency
GUID-5BE20F19-70A9-48A6-B982-C39850A1C634-low.gif
 
Figure 7-2 Offset Voltage Drift Distribution
GUID-9AF5A34F-DEC9-45F9-9750-5C47E74DA66B-low.gif
 
Figure 7-4 Input Offset Current Production Distribution
GUID-4B09FDBB-CAE9-41F5-A3E8-D4FE2AA97884-low.gif
 
Figure 7-6 Offset Voltage vs Common-Mode Voltage
GUID-F476F4EE-0C38-4E32-BA8C-36C44511EF41-low.gif
 
Figure 7-8 Open-Loop Gain and Phase vs Frequency
GUID-449CD309-4AF4-495D-BD71-07029D433DD1-low.gif
 
Figure 7-10 Input Bias Current vs Common-Mode Voltage
GUID-6C4FB8D5-F7F8-401E-8E26-7D1CFE59660D-low.gif
 
Figure 7-12 Output Voltage Swing vs Output Current (Sourcing)
GUID-65C0BD2A-32CC-40BC-A66C-073E63031CB7-low.gif
 
Figure 7-14 CMRR and PSRR vs Frequency
GUID-50B99DB0-2E69-42AA-9265-8AE65A888CD1-low.gif
 
Figure 7-16 PSRR vs Temperature
GUID-7DE8766F-0C65-4EA6-9A5D-43C9B17FE1F4-low.gif
 
Figure 7-18 Input Voltage Noise Spectral Density vs Frequency
GUID-B932D415-D811-4C17-87DA-7297314E7DB2-low.gif
 
Figure 7-20 THD+N vs Output Amplitude
GUID-C1F46255-1B81-4192-9E67-026A5F16670D-low.gif
 
Figure 7-22 Quiescent Current vs Temperature
GUID-3BD89838-DE1B-4D23-9067-B7548E41D48F-low.gif
 
Figure 7-24 Open-Loop Output Impedance vs Frequency
GUID-B6B912C7-B53E-4DF9-AF7B-D690B46C6BE8-low.gif
Noninverting Configuration
Figure 7-26 Small-Signal Overshoot vs Capacitive Load
GUID-34D61409-B016-4DCA-95B6-E7E1DC9E05AD-low.gif
 
Figure 7-28 Positive Overload Recovery
GUID-E23E0893-B067-4D80-89FF-603C1D0A487A-low.gif
Inverting Configuration
Figure 7-30 Small-Signal Step Response
GUID-A4ACA64D-16EA-434D-97D1-ECC3605E116C-low.gif
Inverting Configuration
Figure 7-32 Large-Signal Step Response
GUID-0445F61A-568C-4D98-84A2-A247105627C6-low.gif
 
Figure 7-34 Settling Time
GUID-E07F8BFA-EF3C-42DA-A0A3-BACA404DA939-low.gif
 
Figure 7-36 Maximum Output Voltage vs Frequency
GUID-D309B218-5B0D-4353-BB84-671C805B7125-low.gif
 
Figure 7-38 Channel Separation