SBOS955 February   2019 OPA2356-EP

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Output Drive
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Transimpedance Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 OPA2356-EP Design Procedure
            1. 8.2.1.2.2.1 Optimizing the Transimpedance Circuit
        3. 8.2.1.3 Application Curve
      2. 8.2.2 High-Impedance Sensor Interface
      3. 8.2.3 Driving ADCs
      4. 8.2.4 Active Filter
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

DGK Package
8-Pin VSSOP
Top View
OPA2356-EP po_msop_so-8_opa2356_sbos212.gif

NOTE:

NC means no internal connection.

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
–In A 2 I Inverting input pin, channel A.
–In B 6 I Inverting input pin, channel B.
+In A 3 I Noninverting input pin, channel A.
+In B 5 I Noninverting input pin, channel B.
Out A 1 O Output pin, channel A.
Out B 7 O Output pin, channel B.
V– 4 Negative power supply.
V+ 8 Positive power supply.