SBOS984G November 2020 – September 2023 OPA2387 , OPA387 , OPA4387
PRODUCTION DATA
The OPAx387 use an advanced zero-drift architecture to achieve ultra-low offset and offset drift. This architecture uses a clock and switches internally to create a dc error-correction path. The clocking is filtered internally, and typically not observable for most configurations. Take the following precautions to minimize clock noise in the signal chain. The clocking creates a small charge-injection pulse at the input of the amplifier; therefore, do not use high-value resistors (> 100 kΩ) in series with the inputs to avoid higher clock voltage noise at the output. The charge injection pulses are minimized when the impedance to the input pins is matched. If higher value resistors are used, then use matching impedances on both amplifier input pins.