SBOSAB2A february   2023  – july 2023 OPA2863-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±5 V
    6. 7.6 Electrical Characteristics: VS = 3 V
    7. 7.7 Typical Characteristics: VS = ±5 V
    8. 7.8 Typical Characteristics: VS = 3 V
    9. 7.9 Typical Characteristics: VS = 3 V to 10 V
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Stage
      2. 8.3.2 Output Stage
        1. 8.3.2.1 Overload Power Limit
      3. 8.3.3 ESD Protection
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Low-Side Current Sensing
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Front-End Gain and Filtering
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.1.2 Detailed Design Procedure

In a difference amplifier circuit, the output voltage is given by:

Equation 1. V 0 =   R F R G   I S H R S H + V R E F

For lowest system noise, small values of RF and RG are preferred. The smallest value of RG is limited by the input transient voltage (10 V here) seen by the circuit, and is given by:

Equation 2. R G =   V I N   m a x   -   V D   - V S I D   m a x

where

  • VIN(maximum) is the maximum input transient voltage seen by the circuit
  • VD is the forward voltage drop of ESD diodes at the amplifier input
  • ID(maximum) is the maximum current rating of the ESD diodes at the amplifier input

For a difference amplifier gain of 20 V/V, an RF of 12 kΩ and RG of 600 Ω are used. With a clock frequency of 40 MHz and ADS7056 sampling at 1 MSPS, the available acquisition time for amplifier output settling is 550 ns. Table 9-1 shows the simulation results for the circuit in Figure 9-1. The worst-case peak-to-peak input transient condition is simulated. The output of the OPA2863-Q1 settles to within 0.1% accuracy within 543 ns. If using a slower clock frequency with the ADC is desired, then the acquisition time reduces with the same sampling rate, which degrades measurement accuracy. Alternatively, the sampling rate can be reduced to recover the required acquisition time and 0.1% accuracy.