To achieve optimized performance with a high-frequency amplifier such as the OPA810-Q1requires, pay careful attention to board layout parasitics and external component types. The DEM-OPA-SOT-1A can be used as a reference when designing the circuit board. Recommendations that optimize performance include:

1. Minimize parasitic capacitance to any ac ground for all signal I/O pins. Parasitic capacitance on the output and inverting input pins can cause instability—on the noninverting input, this capacitance can react with the source impedance to cause unintentional band-limiting. To reduce unwanted capacitance, open a window around the signal I/O pins in all ground and power planes around those pins. Otherwise, ground and power planes must be unbroken elsewhere on the board.
2. Minimize the distance (< 0.1 inch) from the power-supply pins to high-frequency, 0.01µF decoupling capacitors. At the device pins, do not allow the ground and power plane layout to be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. Always decouple the power-supply connections with these capacitors. Use larger (2.2µF to 6.8µF) decoupling capacitors, effective at lower frequency, on the supply pins. Place these capacitors somewhat farther from the device and share these capacitors among several devices in the same area of the PCB.
3. Careful selection and placement of external components preserve the high-frequency performance of the OPA810-Q1. Resistors must be a low reactance type. Surface-mount resistors work best and allow a tighter overall layout. Metal film and carbon composition axially leaded resistors can also provide good high-frequency performance. Again, keep the leads and PCB trace length as short as possible. Never use wirewound type resistors in a high-frequency application. Because the output pin and inverting input pin are the most sensitive to parasitic capacitance, always position the feedback and series output resistor, if any, as close as possible to the output pin. Other network components, such as noninverting input termination resistors, must also be placed close to the package. Even with a low parasitic capacitance shunting the external resistors, excessively high resistor values can create significant time constants that can degrade performance. Good axial metal film or surface-mount resistors have approximately 0.2pF in shunt with the resistor. For resistor values greater than 10kΩ, this parasitic capacitance can add a pole or zero close to the GBWP of 70MHz and subsequently affects circuit operation. Keep resistor values as low as possible and consistent with load driving considerations. Lowering the resistor values keeps the resistor noise terms low, and minimizes the effect of parasitic capacitance, however lower resistor values increase the dynamic power consumption because R_F and R_G become part of the amplifiers output load network. Transimpedance applications (see also Section 8.2.1) can use whatever feedback resistor is required by the application as long as the feedback compensation capacitor is set considering all parasitic capacitance terms on the inverting node.
4. Connections to other wideband devices on the board can be made with short direct traces or through on-board transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Relatively wide traces (50 mils to 100 mils) must be used, preferably with ground and power planes opened up around them. Estimate the total capacitive load and set R_S for sufficient phase margin and stability. Low parasitic capacitive loads (< 10pF) do not always require an R_S because the OPA810-Q1 is nominally compensated to operate with a 10pF parasitic load. Higher parasitic capacitive loads without an R_S are allowed with increase in signal gain (increasing the unloaded phase margin). If a long trace is required, and the 6dB signal loss intrinsic to a doubly-terminated transmission line is acceptable, implement a matched impedance transmission line using micro-strip or strip-line techniques (consult an ECL design handbook for micro-strip and strip-line layout techniques). A 50Ω environment is normally not necessary onboard, and a higher impedance environment improves distortion. With a characteristic board trace impedance defined based on board material and trace dimensions, a matching series resistor into the trace from the output of the OPA810-Q1 is used as well as a terminating shunt resistor at the input of the destination device. Remember also that the terminating impedance is the parallel combination of the shunt resistor and the input impedance of the destination device; set this total effective impedance to match the trace impedance. If the 6dB attenuation of a doubly-terminated transmission line is unacceptable, a long trace can be series-terminated at the source end only. Treat the trace as a capacitive load in this case and set the series resistor value to obtain sufficient phase margin and stability. This does not preserve signal integrity as well as a doubly-terminated line. If the input impedance of the destination device is low, the signal attenuates because of the voltage divider formed by the series output into the terminating impedance.
5. Take care to design the PCB layout for optimized thermal dissipation. For the extreme case of 125°C operating ambient, using the approximate 134.8°C/W for the SOIC package, and an internal power of 24V supply × 4.7mA 125°C supply current gives a maximum internal power dissipation of 113mW. This power gives a 15°C increase from ambient to junction temperature. Load power adds to this value, and this dissipation must also be calculated to determine the worst-case safe operating point.
6. Do not socket a high-speed device such as the OPA810-Q1. The additional lead length and pin-to-pin capacitance introduced by the socket can create an extremely troublesome parasitic network that can almost make achieving a smooth, stable frequency response impossible. Best results are obtained by soldering the OPA810-Q1 onto the board.