SBOS303D June   2004  – December 2016 OPA820

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±5 V
    6. 7.6 Electrical Characteristics: VS = 5 V
    7. 7.7 Typical Characteristics
      1. 7.7.1 ±5-V Supply Voltage
      2. 7.7.2 5-V Supply Voltage
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Feature Description
      1. 9.2.1 Input and ESD Protection
      2. 9.2.2 Bandwidth versus Gain
      3. 9.2.3 Output Drive Capability
      4. 9.2.4 Driving Capacitive Loads
      5. 9.2.5 Distortion Performance
      6. 9.2.6 Noise Performance
      7. 9.2.7 DC Offset Control
      8. 9.2.8 Thermal Analysis
    3. 9.3 Device Functional Modes
      1. 9.3.1 Wideband Noninverting Operation
      2. 9.3.2 Wideband Inverting Operation
      3. 9.3.3 Wideband Single-Supply Operation
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Optimizing Resistor Values
    2. 10.2 Typical Applications
      1. 10.2.1 Active Filter Design
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 High-Q Bandpass Filter Design Procedure
          2. 10.2.1.2.2 Low-Pass Butterworth Filter Design Procedure
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Buffering High-Performance ADCs
      3. 10.2.3 Video Line Driving
      4. 10.2.4 Single Differential Op Amp
      5. 10.2.5 Triple Differencing Op Amp (Instrumentation Topology)
      6. 10.2.6 DAC Transimpedance Amplifier
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Minimizing Parasitic Capacitance
      2. 12.1.2 Minimizing Distance from Power Supply to Decoupling Capacitors
      3. 12.1.3 Selecting and Placing External Components
      4. 12.1.4 Connecting Other Wideband Devices
      5. 12.1.5 Socketing
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Design-In Tools
        1. 13.1.1.1 Demonstration Fixtures
        2. 13.1.1.2 Macromodels and Applications Support
      2. 13.1.2 Development Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Power supply ±6.5 VDC
Internal power dissipation See Thermal Information
Differential input voltage ±1.2 V
Input common-mode voltage ±VS V
Junction temperature, TJ 150 °C
Storage temperature, Tstg –65 125 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±3000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
Machine model (MM) ±300
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VS Total supply voltage 5 10 12 V
TA Operating ambient temperature –45 25 85 °C

7.4 Thermal Information

THERMAL METRIC(1) OPA820 UNIT
DBV (SOT-23) D (SOIC)
5 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 150 125 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 141.1 72.6 °C/W
RθJB Junction-to-board thermal resistance 42.9 68.2 °C/W
ψJT Junction-to-top characterization parameter 23.5 28.1 °C/W
ψJB Junction-to-board characterization parameter 42 67.8 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

7.5 Electrical Characteristics: VS = ±5 V

RF = 402 Ω, RL = 100 Ω, G = 2, and TA = 25°C (unless otherwise noted)(1)(2)(3)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
Small-signal bandwidth G = 1, VO = 0.1 VPP, RF = 0 Ω, Test level = C 800 MHz
G = 2, VO = 0.1 VPP,
Test level = B		 TA = 25°C 170 240
TA = 0°C to 70°C 160
TA = –40°C to 85°C 155
G = 10, VO = 0.1 VPP,
Test level = B		 TA = 25°C 23 30
TA = 0°C to 70°C 21
TA = –40°C to 85°C 20
Gain-bandwidth product G ≥ 20, Test level = B TA = 25°C 220 280 MHz
TA = 0°C to 70°C 204
TA = –40°C to 85°C 200
Bandwidth for 0.1-dB gain flatness G = 2, VO = 0.1 VPP, Test level = C 38 MHz
Peaking at a gain of 1 VO = 0.1 VPP, RF = 0 Ω, Test level = C 0.5 dB
Large-signal bandwidth G = 2, VO = 2 VPP, Test level = C 85 MHz
Slew rate G = 2, 2-V step,
Test level = B		 TA = 25°C 192 240 V/µs
TA = 0°C to 70°C 186
TA = –40°C to 85°C 180
Rise time and fall time G = 2, VO = 0.2-V step, Test level = C 1.5 ns
Settling time G = 2, VO = 2-V step,
Test level = C		 To 0.02% 22 ns
To 0.1% 18
Harmonic distortion, 2nd-harmonic G = 2, f = 1 MHz,
VO = 2 VPP, RL = 200 Ω,
Test level = B		 TA = 25°C –85 –81 dBc
TA = 0°C to 70°C –80
TA = –40°C to 85°C –79
G = 2, f = 1 MHz,
VO = 2 VPP, RL ≥ 500 Ω,
Test level = B		 TA = 25°C –90 –85
TA = 0°C to 70°C –83
TA = –40°C to 85°C –81
Harmonic distortion, 3rd-harmonic G = 2, f = 1 MHz,
VO = 2 VPP, RL = 200 Ω,
Test level = B		 TA = 25°C –95 –90 dBc
TA = 0°C to 70°C –89
TA = –40°C to 85°C –88
G = 2, f = 1 MHz,
VO = 2 VPP, RL ≥ 500 Ω,
Test level = B		 TA = 25°C –110 –105
TA = 0°C to 70°C –102
TA = –40°C to 85°C –100
Input voltage noise f > 100 kHz, Test level = B TA = 25°C 2.5 2.7 nV/√Hz
TA = 0°C to 70°C 2.8
TA = –40°C to 85°C 2.9
Input current noise f > 100 kHz, Test level = B TA = 25°C 1.7 2.6 pA/√Hz
TA = 0°C to 70°C 2.8
TA = –40°C to 85°C 3
Differential gain G = 2, PAL, VO = 1.4 VPP, RL = 150 Ω, Test level = C 0.01%
Differential phase G = 2, PAL, VO = 1.4 VPP, RL = 150 Ω, Test level = C 0.03 °
DC PERFORMANCE(4)
AOL Open-loop voltage gain VCM = 0 V, Test level = A TA = 25°C 62 66 dB
TA = 0°C to 70°C 61
TA = –40°C to 85°C 60
Input offset voltage VCM = 0 V, Test level = A TA = 25°C ±0.2 ±0.75 mV
TA = 0°C to 70°C ±1
TA = –40°C to 85°C ±1.2
Average input offset voltage drift VCM = 0 V, Test level = B TA = 0°C to 70°C 4 µV/°C
TA = –40°C to 85°C 4
Input bias current VCM = 0 V, Test level = A TA = 25°C –9 –17 µA
TA = 0°C to 70°C –19
TA = –40°C to 85°C –23
Average input bias current drift VCM = 0 V, Test level = B TA = 0°C to 70°C 30 nA/°C
TA = –40°C to 85°C 50
Input offset current VCM = 0 V, Test level = A TA = 25°C ±100 ±400 nA
TA = 0°C to 70°C ±600
TA = –40°C to 85°C ±700
Inverting input bias-current drift VCM = 0 V, Test level = B TA = 0°C to 70°C 5 nA/°C
TA = –40°C to 85°C 5
INPUT
CMIR Common-mode input range(5) Test level = A TA = 25°C ±3.8 ±4 V
TA = 0°C to 70°C ±3.7
TA = –40°C to 85°C ±3.6
CMRR Common-mode rejection ratio VCM = 0 V, Input-referred,
Test level = A		 TA = 25°C 76 85 dB
TA = 0°C to 70°C 75
TA = –40°C to 85°C 73
Input impedance, differential mode VCM = 0 V, TA = 25°C, Test level = C 18 || 0.8 kΩ || pF
Input impedance, common mode VCM = 0 V, TA = 25°C, Test level = C 6 || 1 MΩ || pF
OUTPUT
Output voltage swing No load, Test level = A TA = 25°C ±3.5 ±3.7 V
TA = 0°C to 70°C ±3.42
TA = –40°C to 85°C ±3.4
RL = 100 Ω, Test level = A TA = 25°C ±3.5 ±3.6
TA = 0°C to 70°C ±3.45
TA = –40°C to 85°C ±3.4
Output current VO = 0 V, Test level = A TA = 25°C ±90 ±110 mA
TA = 0°C to 70°C ±80
TA = –40°C to 85°C ±75
Short-circuit output current Output shorted to ground, Test level = C ±125 mA
Closed-loop output impedance G = 2, f ≤ 100 kHz, Test level = C 0.04 Ω
POWER SUPPLY
Quiescent current VS = ±5 V, Test level = A TA = 25°C 5.45 5.6 5.75 mA
TA = 0°C to 70°C 5 6.2
TA = –40°C to 85°C 4.8 6.4
PSRR Power-supply rejection ratio Input referred, Test level = A TA = 25°C 64 72 dB
TA = 0°C to 70°C 63
TA = –40°C to 85°C 62
(1) Test levels: (A) 100% tested at 25°C. Overtemperature limits by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information.
(2) TJ = TA for 25°C specifications.
(3) TJ = TA at low temperature limits; TJ = TA + 9°C at high temperature limit for over temperature.
(4) Current is considered positive out-of-node. VCM is the input common-mode voltage.

7.6 Electrical Characteristics: VS = 5 V

RF = 402 Ω, RL = 100 Ω, G = 2, and TA = 25°C (unless otherwise noted)(1)(2)(3)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
Small-signal bandwidth G = 1, VO = 0.1 VPP, RF = 0 Ω, Test level = C 550 MHz
G = 2, VO = 0.1 VPP,
Test level = B		 TA = 25°C 168 230
TA = 0°C to 70°C 155
TA = –40°C to 85°C 151
G = 10, VO = 0.1 VPP,
Test level = B		 TA = 25°C 21 28
TA = 0°C to 70°C 20
TA = –40°C to 85°C 19
Gain-bandwidth product G ≥ 20, Test level = B TA = 25°C 200 260 MHz
TA = 0°C to 70°C 190
TA = –40°C to 85°C 185
Peaking at a gain of 1 VO = 0.1 VPP, RF = 0 Ω, Test level = C 0.5 dB
Large-signal bandwidth G = 2, VO = 2 VPP, Test level = C 70 MHz
Slew rate G = 2, 2-V step,
Test level = B		 TA = 25°C 145 200 V/µs
TA = 0°C to 70°C 140
TA = –40°C to 85°C 135
Rise time and fall time G = 2, VO = 2-V step, Test level = C 1.7 ns
Settling time G = 2, VO = 2-V step,
Test level = C		 To 0.02% 24 ns
To 0.1% 21
Harmonic distortion, 2nd-harmonic G = 2, f = 1 MHz,
VO = 2 VPP, RL = 200 Ω,
Test level = B		 TA = 25°C –80 –76 dBc
TA = 0°C to 70°C –75
TA = –40°C to 85°C –74
G = 2, f = 1 MHz,
VO = 2 VPP, RL ≥ 500 Ω,
Test level = B		 TA = 25°C –83 –79
TA = 0°C to 70°C –77
TA = –40°C to 85°C –75
Harmonic distortion, 3rd-harmonic G = 2, f = 1 MHz,
VO = 2 VPP, RL = 200 Ω,
Test level = B		 TA = 25°C –100 –92 dBc
TA = 0°C to 70°C –91
TA = –40°C to 85°C –90
G = 2, f = 1 MHz,
VO = 2 VPP, RL ≥ 500 Ω,
Test level = B		 TA = 25°C –98 –95
TA = 0°C to 70°C –93
TA = –40°C to 85°C –92
Input voltage noise f > 100 kHz, Test level = B TA = 25°C 2.5 2.8 nV/√Hz
TA = 0°C to 70°C 2.9
TA = –40°C to 85°C 3
Input current noise f > 100 kHz, Test level = B TA = 25°C 1.6 2.5 pA/√Hz
TA = 0°C to 70°C 2.7
TA = –40°C to 85°C 2.9
DC PERFORMANCE(4)
AOL Open-loop voltage gain VO = 2.5 V, Test level = A TA = 25°C 60 65 dB
TA = 0°C to 70°C 59
TA = –40°C to 85°C 58
Input offset voltage VCM = 2.5 V, Test level = A TA = 25°C ±0.3 ±1.1 mV
TA = 0°C to 70°C ±1.4
TA = –40°C to 85°C ±1.6
Average input offset voltage drift VCM = 2.5 V, Test level = B TA = 0°C to 70°C 4 µV/°C
TA = –40°C to 85°C 4
Input bias current VCM = 2.5 V, Test level = A TA = 25°C –8 –16 µA
TA = 0°C to 70°C –18
TA = –40°C to 85°C –22
Average input bias current drift VCM = 2.5 V, Test level = B TA = 0°C to 70°C 30 nA/°C
TA = –40°C to 85°C 50
Input offset current VCM = 2.5 V, Test level = A TA = 25°C ±100 ±400 nA
TA = 0°C to 70°C ±600
TA = –40°C to 85°C ±700
Inverting input bias-current drift VCM = 2.5 V, Test level = B TA = 0°C to 70°C 5 nA/°C
TA = –40°C to 85°C 5
INPUT
Lease positive input voltage Test level = A TA = 25°C 0.9 1.1 V
TA = 0°C to 70°C 1.2
TA = –40°C to 85°C 1.3
Most positive input voltage Test level = A TA = 25°C 4.2 4.5 V
TA = 0°C to 70°C 4.1
TA = –40°C to 85°C 4
CMRR Common-mode rejection ratio VCM = 2.5 V, Input-referred,
Test level = A		 TA = 25°C 74 83 dB
TA = 0°C to 70°C 73
TA = –40°C to 85°C 72
Input impedance, differential mode VCM = 2.5 V, TA = 25°C, Test level = C 15 || 1 kΩ || pF
Input impedance, common mode VCM = 2.5 V, TA = 25°C, Test level = C 5 || 1.3 MΩ || pF
OUTPUT
Most positive output voltage No load, Test level = A TA = 25°C 3.8 3.9 V
TA = 0°C to 70°C 3.75
TA = –40°C to 85°C 3.7
RL = 100 Ω to 2.5 V,
Test level = A		 TA = 25°C 3.7 3.8
TA = 0°C to 70°C 3.65
TA = –40°C to 85°C 3.6
Least positive output voltage No load, Test level = A TA = 25°C 1.2 1.3 V
TA = 0°C to 70°C 1.35
TA = –40°C to 85°C 1.4
RL = 100 Ω to 2.5 V,
Test level = A		 TA = 25°C 1.2 1.3
TA = 0°C to 70°C 1.35
TA = –40°C to 85°C 1.4
Output current VO = 2.5 V, Test level = A TA = 25°C ±80 ±105 mA
TA = 0°C to 70°C ±70
TA = –40°C to 85°C ±65
Short-circuit output current Output shorted to ground, Test level = C ±115 mA
Closed-loop output impedance G = 2, f ≤ 100 kHz, Test level = C 0.04 Ω
POWER SUPPLY
Quiescent current VS = ±5 V, Test level = A TA = 25°C 4.4 5 5.4 mA
TA = 0°C to 70°C 4.25 5.5
TA = –40°C to 85°C 4.1 5.6
PSRR Power-supply rejection ratio Input referred, TA = 25°C, Test level = A 68 dB
(1) Test levels: (A) 100% tested at 25°C. Overtemperature limits by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information.
(2) TJ = TA for 25°C specifications.
(3) TJ = TA at low temperature limits; TJ = TA + 9°C at high temperature limit for over temperature.
(4) Current is considered positive out-of-node. VCM is the input common-mode voltage.
(5) Tested at less than 3 dB below the minimum specified CMRR at ± CMIR limits.

7.7 Typical Characteristics

7.7.1 ±5-V Supply Voltage

VS = ±5 V, RF = 402 Ω, RL = 100 Ω, G = 2, and TA = 25°C (unless otherwise noted)
OPA820 tc_p-m5v_non-invert_small_freq_sbos303.gif
VO = 0.1 VPP RF = 0 Ω at G = 1 See Figure 55
Figure 1. Noninverting Small-Signal Frequency Response
OPA820 tc_p-m5v_non-invert_large_freq_sbos303.gif
G = 2 See Figure 55
Figure 3. Noninverting Large-Signal Frequency Response
OPA820 tc_p-m5v_non-invert_pulse_sbos303.gif
G = 2 See Figure 55
Figure 5. Noninverting Pulse Response
OPA820 tc_p-m5v_hd_v_load-res_sbos303.gif
f = 1 MHz VO = 2 VPP G = 2 V/V
See Figure 55
Figure 7. Harmonic Distortion vs Load Resistance
OPA820 tc_p-m5v_hd_v_freq_sbos303.gif
VO = 2 VPP G = 2 V/V
See Figure 55
Figure 9. Harmonic Distortion vs Frequency
OPA820 tc_p-m5v_hd_v_non-invert_gain_sbos303.gif
f = 1 MHz RL = 200 Ω VO = 2 VPP
See Figure 55
Figure 11. Harmonic Distortion vs Noninverting Gain
OPA820 tc_p-m5v_input_and_curr-noise_sbos303.gif
Figure 13. Input Voltage and Current Noise
OPA820 tc_p-m5v_rs_v_cap-load_sbos303.gif
0-dB peaking targeted
Figure 15. Recommended RS vs Capacitive Load
OPA820 tc_p-m5v_cmrr-psrr_v_freq_sbos303.gif Figure 17. CMRR and PSRR vs Frequency
OPA820 tc_p-m5v_vo_current-limitations_sbos303.gif Figure 19. Output Voltage and Current Limitations
OPA820 tc_p-m5v_non-invert_overdrive_sbos303.gif
G = 2 V/V See Figure 55
Figure 21. Noninverting Overdrive Recovery
OPA820 tc_p-m5v_composite_video_sbos303.gif
G = 2 V/V
Figure 23. Composite Video dG/dP
OPA820 tc_p-m5v_supply-io_v_temp_sbos303.gif Figure 25. Supply and Output Current vs Temperature
OPA820 tc_p-m5v_cm_diff-impeadance_sbos303.gif
Figure 27. Common-Mode and Differential Input Impedance
OPA820 tc_p-m5v_input-offset_curr_distribution_sbos303.gif
Mean = 26 nA Standard deviation = 57 nA Total count = 6115
Figure 29. Typical Input Offset Current Distribution
OPA820 tc_p-m5v_invert_small_freq_sbos303.gif
VO = 0.1 VPP See Figure 56
Figure 2. Inverting Small-Signal Frequency Response
OPA820 tc_p-m5v_invert_large_freq_sbos303.gif
G = –1 See Figure 56
Figure 4. Inverting Large-Signal Frequency Response
OPA820 tc_p-m5v_invert_pulse_sbos303.gif
G = –1 See Figure 56
Figure 6. Inverting Pulse Response
OPA820 tc_p-m5v_hd_v_supply_sbos303.gif
VO = 2 VPP RL = 200 Ω G = 2 V/V
See Figure 55
Figure 8. 1-MHz Harmonic Distortion vs Supply Voltage
OPA820 tc_p-m5v_hd_v_output_sbos303.gif
f = 1 MHz RL = 200 Ω G = 2 V/V
See Figure 55
Figure 10. Harmonic Distortion vs Output Voltage
OPA820 tc_p-m5v_hd_v_invert_gain_sbos303.gif
f = 1 MHz RL = 200 Ω VO = 2 VPP
See Figure 56
Figure 12. Harmonic Distortion vs Inverting Gain
OPA820 tc_p-m5v_two-tone_intermod_sbos303.gif
See Figure 48
Figure 14. Two-Tone, 3rd-Order Intermodulation Intercept
OPA820 tc_p-m5v_freq-response_v_cap-load_sbos303.gif
See Figure 49
Figure 16. Frequency Response vs Capacitive Load
OPA820 tc_p-m5v_open-loop_gain-phase_sbos303.gif Figure 18. Open-Loop Gain and Phase
OPA820 tc_p-m5v_cl-output-impedance_v_freq_sbos303.gif Figure 20. Closed-Loop Output Impedance vs Frequency
OPA820 tc_p-m5v_invert_overdrive_sbos303.gif
G = 2 V/V See Figure 56
Figure 22. Inverting Overdrive Recovery
OPA820 tc_p-m5v_dc-drive_over-temp_sbos303.gif
Figure 24. Typical DC Drift Over Temperature
OPA820 tc_p-m5v_vcm-output-swing_v_vs_sbos303.gif Figure 26. Common-Mode Input Range and Output Swing vs Supply Voltage
OPA820 tc_p-m5v_input-offset_v-distribution_sbos303.gif
Mean = –30 µV Total count = 6115
Standard deviation = 80 µV
Figure 28. Typical Input Offset Voltage Distribution

7.7.2 5-V Supply Voltage

VS = 5 V, RF = 402 Ω, RL = 100 Ω, G = 2, and TA = 25°C (unless otherwise noted)
OPA820 tc_5v_non-invert_small_freq_sbos303.gif
VO = 0.1 VPP See Figure 57
Figure 30. Noninverting Small-Signal Frequency Response
OPA820 tc_5v_non-invert_large_freq_sbos303.gif
G = 2 V/V See Figure 57
Figure 32. Noninverting Large-Signal Frequency Response
OPA820 tc_5v_non-invert_pulse_sbos303.gif
G = 2 See Figure 57
Figure 34. Noninverting Pulse Response
OPA820 tc_5v_hd_v_load-res_sbos303.gif
G = 2 V/V f = 1 MHz VO = 2 VPP
See Figure 57
Figure 36. Harmonic Distortion vs Load Resistance
OPA820 tc_5v_hd_v_output_sbos303.gif
f = 1 MHz RL = 200 Ω VO = 2 VPP
G = 2 V/V
Figure 38. Harmonic Distortion vs Output Voltage
OPA820 tc_5v_hd_v_invert_gain_sbos303.gif
f = 1 MHz RL = 200 Ω VO = 2 VPP
Figure 40. Harmonic Distortion vs Inverting Gain
OPA820 tc_5v_rs_v_cap-load_sbos303.gif
0-dB peaking targeted
Figure 42. Recommended RS vs Capacitive Load
OPA820 tc_5v_dc-drift_over-temp_sbos303.gif Figure 44. Typical DC Drift Over Temperature
OPA820 tc_5v_input-offset_v-distribution_sbos303.gif
Mean = 490 µV Total count = 6115
Standard deviation = 90 µV
Figure 46. Typical Input Offset Voltage Distribution
OPA820 tc_5v_invert_small_freq_sbos303.gif
VO = 0.1 VPP See Figure 58
Figure 31. Inverting Small-Signal Frequency Response
OPA820 tc_5v_invert_large_freq_sbos303.gif
G = –1 See Figure 58
Figure 33. Inverting Large-Signal Frequency Response
OPA820 tc_5v_invert_pulse_sbos303.gif
G = –1 See Figure 58
Figure 35. Inverting Pulse Response
OPA820 tc_5v_hd_v_freq_sbos303.gif
G = 2 V/V RL = 200 Ω VO = 2 VPP
See Figure 57
Figure 37. Harmonic Distortion vs Frequency
OPA820 tc_5v_hd_v_non-invert_gain_sbos303.gif
f = 1 MHz RL = 200 Ω VO = 2 VPP
Figure 39. Harmonic Distortion vs Noninverting Gain
OPA820 tc_5v_two-tone_intermod_sbos303.gif
See Figure 50
Figure 41. Two-Tone, 3rd-Order Intermodulation Intercept
OPA820 tc_5v_freq-response_v_cap-load_sbos303.gif
See Figure 51
Figure 43. Frequency Response vs Capacitive Load
OPA820 tc_5v_supply-io_v_temp_sbos303.gif Figure 45. Supply and Output Current vs Temperature
OPA820 tc_5v_input-offset_curr_distribution_sbos303.gif
Mean = 43 nA Total count = 6115
Standard deviation = 50 nA
Figure 47. Typical Input Offset Current Distribution