SBOSA57A February 2021 – March 2021 OPA855-Q1

PRODUCTION DATA

- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information

- DSG|8

- DSG|8

When configuring the OPA855-Q1 as a transimpedance amplifier additional care must be taken to minimize the inductance between the avalanche photodiode (APD) and the amplifier. Always place the photodiode on the same side of the PCB as the amplifier. Placing the amplifier and the APD on opposite sides of the PCB increases the parasitic effects due to via inductance. APD packaging can be quite large which often requires the APD to be placed further away from the amplifier than ideal. The added distance between the two device results in increased inductance between the APD and op amp feedback network as shown in Figure 11-2. The added inductance is detrimental to a decompensated amplifiers stability since it isolates the APD capacitance from the noise gain transfer function. The noise gain is given by Equation 2. The added PCB trace inductance between the feedback network increases the denominator in Equation 2 thereby reducing the noise gain and the phase margin. In cases where a leaded APD in a TO can is used inductance should be further minimized by cutting the leads of the TO can as short as possible.

The layout shown in Figure 11-2 can be improved by following some of the guidelines shown in Figure 11-3. The two key rules to follow are:

- Add an isolation resistor R
_{ISO}as close as possible to the inverting input of the amplifier. Select the value of R_{ISO}to be between 10 Ω and 20 Ω. The resistor dampens the potential resonance caused by the trace inductance and the amplifiers internal capacitance. - Close the loop between the feedback elements (R
_{F}and C_{F}) and R_{ISO}as close to the APD pins as possible. This ensures a more balanced layout and reduces the inductive isolation between the APD and the feedback network.

Equation 2.

where

- Z
_{F}is the total impedance of the feedback network. - Z
_{IN}is the total impedance of the input network.