SLAS831D March 2014 – March 2018 PCM1860 , PCM1861 , PCM1862 , PCM1863 , PCM1864 , PCM1865
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SCK_XI_SEL | MST_SCK_SRC | MST_MODE | ADC_CLK_SRC | DSP2_CLK_SRC | DSP1_CLK_SRC | CLKDET_EN | |
R/W-00b | R/W-0b | R/W-0b | R/W-0b | R/W-0b | R/W-0b | R/W-1b |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-6 | SCK_XI_SEL | R/W | 00b | SCK or XTAL Selection
00: SCK or XTAL (default) 01: SCK 10: XTAL 11: Reserved |
5 | MST_SCK_SRC | R/W | 0b | Master-Mode SCK Source Selection
0: SCK or XI (default) 1: PLL (as in BCK PLL mode) |
4 | MST_MODE | R/W | 0b | Master or Slave Selection
0: Slave (default) 1: Master |
3 | ADC_CLK_SRC | R/W | 0b | ADC Clock Source Selection (ignored if CLKDET_EN = 1)
0: SCK (default) 1: PLL |
2 | DSP2_CLK_SRC | R/W | 0b | DSP2 Clock Source Selection (ignored if CLKDET_EN = 1)
0: SCK (default) 1: PLL |
1 | DSP1_CLK_SRC | R/W | 0b | DSP1 Clock Source Selection (ignored if CLKDET_EN = 1)
0: SCK (default) 1: PLL |
0 | CLKDET_EN | R/W | 1b | Enable Auto Clock Detector Configuration
0: Disable 1: Enable (default) |