SLAS724A September   2008  – November 2014 PCM3070

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  Handling Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Electrical Characteristics, ADC
    6. 8.6  Electrical Characteristics, Bypass Outputs
    7. 8.7  Electrical Characteristics, Audio DAC Outputs
    8. 8.8  Electrical Characteristics, LDO
    9. 8.9  Electrical Characteristics, Misc.
    10. 8.10 Electrical Characteristics, Logic Levels
    11. 8.11 I2S LJF and RJF Timing in Master Mode (see )
    12. 8.12 I2S LJF and RJF Timing in Slave Mode (see )
    13. 8.13 DSP Timing in Master Mode (see )
    14. 8.14 DSP Timing in Slave Mode (see )
    15. 8.15 I2C Interface Timing
    16. 8.16 SPI Interface Timing (See )
    17. 8.17 Typical Characteristics
      1. 8.17.1 Typical Performance
      2. 8.17.2 Typical Characteristics, FFT
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Device Connections
        1. 10.3.1.1 Digital Pins
          1. 10.3.1.1.1 Multifunction Pins
        2. 10.3.1.2 Analog Pins
      2. 10.3.2 Analog Audio I/O
        1. 10.3.2.1 Analog Bypass
        2. 10.3.2.2 ADC Bypass Using Mixer Amplifiers
        3. 10.3.2.3 Headphone Output
        4. 10.3.2.4 Line Outputs
      3. 10.3.3 ADC
        1. 10.3.3.1 ADC Processing
          1. 10.3.3.1.1 ADC Processing Blocks
      4. 10.3.4 DAC
        1. 10.3.4.1 DAC Processing Blocks — Overview
      5. 10.3.5 Digital Audio IO Interface
      6. 10.3.6 Clock Generation and PLL
      7. 10.3.7 Control Interfaces
        1. 10.3.7.1 I2C Control
        2. 10.3.7.2 SPI Control
    4. 10.4 Device Functional Modes
      1. 10.4.1 MiniDSP
      2. 10.4.2 Software
    5. 10.5 Register Map
      1. 10.5.1 Register Map Summary
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
        1. 11.2.1.1 Reference Filtering Capacitor
      2. 11.2.2 Detailed Design Procedures
        1. 11.2.2.1 Analog Input Connection
        2. 11.2.2.2 Analog Output Connection
      3. 11.2.3 Application Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Documentation Support
      1. 14.1.1 Related Documentation
    2. 14.2 Trademarks
    3. 14.3 Electrostatic Discharge Caution
    4. 14.4 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Revision History

Changes from * Revision (February 2011) to A Revision

  • Added Pin Configuration and Functions section, Handling Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go