SBASA30 December   2020 PCM6480-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Timing Requirements: I2C Interface
    7. 7.7  Switching Characteristics: I2C Interface
    8. 7.8  Timing Requirements: SPI Interface
    9. 7.9  Switching Characteristics: SPI Interface
    10. 7.10 Timing Requirements: TDM, I2S or LJ Interface
    11. 7.11 Switching Characteristics: TDM, I2S or LJ Interface
    12. 7.12 Timing Requirements: PDM Digital Microphone Interface
    13. 7.13 Switching Characteristics: PDM Digial Microphone Interface
    14. 7.14 Timing Diagrams
    15. 7.15 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Serial Interfaces
        1. 8.3.1.1 Control Serial Interfaces
        2. 8.3.1.2 Audio Serial Interfaces
          1. 8.3.1.2.1 Time Division Multiplexed Audio (TDM) Interface
          2. 8.3.1.2.2 Inter IC Sound (I2S) Interface
          3. 8.3.1.2.3 Left-Justified (LJ) Interface
        3. 8.3.1.3 Using Multiple Devices With Shared Buses
      2. 8.3.2  Phase-Locked Loop (PLL) and Clock Generation
      3. 8.3.3  Analog Input Channel Configuration
      4. 8.3.4  Reference Voltage
      5. 8.3.5  Microphone Bias
      6. 8.3.6  Input DC Fault Diagnostics
        1. 8.3.6.1 Fault Conditions
          1. 8.3.6.1.1 Input Pin Short to Ground
          2. 8.3.6.1.2 Input Pin Short to MICBIAS
          3. 8.3.6.1.3 Open Inputs
          4. 8.3.6.1.4 Short Between INxP and INxM
          5. 8.3.6.1.5 Input Pin Overvoltage
          6. 8.3.6.1.6 Input Pin Short to VBAT_IN
        2. 8.3.6.2 Fault Reporting
          1. 8.3.6.2.1 Overcurrent and Overtemperature Protection
      7. 8.3.7  Digital PDM Microphone Record Channel
      8. 8.3.8  Signal-Chain Processing
        1. 8.3.8.1 Programmable Channel Gain and Digital Volume Control
        2. 8.3.8.2 Programmable Channel Gain Calibration
        3. 8.3.8.3 Programmable Channel Phase Calibration
        4. 8.3.8.4 Programmable Digital High-Pass Filter
        5. 8.3.8.5 Programmable Digital Biquad Filters
        6. 8.3.8.6 Programmable Channel Summer and Digital Mixer
        7. 8.3.8.7 Configurable Digital Decimation Filters
          1. 8.3.8.7.1 Linear Phase Filters
            1. 8.3.8.7.1.1 Sampling Rate: 8 kHz or 7.35 kHz
            2. 8.3.8.7.1.2 Sampling Rate: 16 kHz or 14.7 kHz
            3. 8.3.8.7.1.3 Sampling Rate: 24 kHz or 22.05 kHz
            4. 8.3.8.7.1.4 Sampling Rate: 32 kHz or 29.4 kHz
            5. 8.3.8.7.1.5 Sampling Rate: 48 kHz or 44.1 kHz
            6. 8.3.8.7.1.6 Sampling Rate: 96 kHz or 88.2 kHz
            7. 8.3.8.7.1.7 Sampling Rate: 192 kHz or 176.4 kHz
            8. 8.3.8.7.1.8 Sampling Rate: 384 kHz or 352.8 kHz
            9. 8.3.8.7.1.9 Sampling Rate: 768 kHz or 705.6 kHz
          2. 8.3.8.7.2 Low-Latency Filters
            1. 8.3.8.7.2.1 Sampling Rate: 16 kHz or 14.7 kHz
            2. 8.3.8.7.2.2 Sampling Rate: 24 kHz or 22.05 kHz
            3. 8.3.8.7.2.3 Sampling Rate: 32 kHz or 29.4 kHz
            4. 8.3.8.7.2.4 Sampling Rate: 48 kHz or 44.1 kHz
            5. 8.3.8.7.2.5 Sampling Rate: 96 kHz or 88.2 kHz
            6. 8.3.8.7.2.6 Sampling Rate: 192 kHz or 176.4 kHz
          3. 8.3.8.7.3 Ultra-Low-Latency Filters
            1. 8.3.8.7.3.1 Sampling Rate: 16 kHz or 14.7 kHz
            2. 8.3.8.7.3.2 Sampling Rate: 24 kHz or 22.05 kHz
            3. 8.3.8.7.3.3 Sampling Rate: 32 kHz or 29.4 kHz
            4. 8.3.8.7.3.4 Sampling Rate: 48 kHz or 44.1 kHz
            5. 8.3.8.7.3.5 Sampling Rate: 96 kHz or 88.2 kHz
            6. 8.3.8.7.3.6 Sampling Rate: 192 kHz or 176.4 kHz
            7. 8.3.8.7.3.7 Sampling Rate: 384 kHz or 352.8 kHz
      9. 8.3.9  Automatic Gain Controller (AGC)
      10. 8.3.10 Interrupts, Status, and Digital I/O Pin Multiplexing
    4. 8.4 Device Functional Modes
      1. 8.4.1 Hardware Shutdown
      2. 8.4.2 Sleep Mode or Software Shutdown
      3. 8.4.3 Active Mode
      4. 8.4.4 Software Reset
    5. 8.5 Programming
      1. 8.5.1 Control Serial Interfaces
        1. 8.5.1.1 I2C Control Interface
          1. 8.5.1.1.1 General I2C Operation
          2. 8.5.1.1.2 I2C Single-Byte and Multiple-Byte Transfers
            1. 8.5.1.1.2.1 I2C Single-Byte Write
            2. 8.5.1.1.2.2 I2C Multiple-Byte Write
            3. 8.5.1.1.2.3 I2C Single-Byte Read
            4. 8.5.1.1.2.4 I2C Multiple-Byte Read
        2. 8.5.1.2 SPI Control Interface
    6. 8.6 Register Maps
      1. 8.6.1 Device Configuration Registers
        1. 8.6.1.1 Registers Access Type
        2. 8.6.1.2 Page 0 Registers
        3. 8.6.1.3 Page 1 Registers
      2. 8.6.2 Programmable Coefficient Registers
        1. 8.6.2.1 Programmable Coefficient Registers: Page 2
        2. 8.6.2.2 Programmable Coefficient Registers: Page 3
        3. 8.6.2.3 Programmable Coefficient Registers: Page 4
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Four-Channel Analog Microphone and Four-Channel PDM Microphone Simultaneous Recording Using the PCM6480-Q1
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Example Device Register Configuration Script for EVM Setup
        3. 9.2.1.3 Application Curves
    3. 9.3 What To Do and What Not To Do
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.6.1.3 Page 1 Registers

GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_TABLE_1 lists the memory-mapped registers for the Page 1 registers. All register offset addresses not listed in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_TABLE_1 should be considered as reserved locations and the register contents should not be modified.

Table 8-149 PAGE 1 Registers
AddressAcronymRegister NameReset ValueSection
0x0PAGE_CFGDevice page register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_PAGE_CFG
0x16MBIAS_LOADMICBIAS internal load sink configuration register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_MBIAS_LOAD
0x2CINT_LIVE0Live interrupt readback register 00x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_INT_LIVE0
0x2DCHx_LIVEChannel diagnostic summary live status register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CHX_LIVE
0x2ECH1_LIVEChannel 1 diagnostic live status register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CH1_LIVE
0x2FCH2_LIVEChannel 2 diagnostic live status register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CH2_LIVE
0x30CH3_LIVEChannel 3 diagnostic live status register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CH3_LIVE
0x31CH4_LIVEChannel 4 diagnostic live status register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CH4_LIVE
0x35INT_LIVE1Live interrupt readback register 10x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_INT_LIVE1
0x37INT_LIVE3Live interrupt readback register 30x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_INT_LIVE3
0x55MBIAS_OV_CFGMICBIAS overvoltage threshold register0x40GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_MBIAS_OV_CFG
0x59DIAGDATA_CFGDiagnostic data configuration register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAGDATA_CFG
0x5ADIAG_MON_MSB_VBATDiagnostic VBAT_IN data MSB byte register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_VBAT
0x5BDIAG_MON_LSB_VBATDiagnostic VBAT_IN data LSB nibble register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_VBAT
0x5CDIAG_MON_MSB_MBIASDiagnostic MICBIAS data MSB byte register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_MBIAS
0x5DDIAG_MON_LSB_MBIASDiagnostic MICBIAS data LSB nibble register0x01GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_MBIAS
0x5EDIAG_MON_MSB_IN1PDiagnostic IN1P data MSB byte register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN1P
0x5FDIAG_MON_LSB_IN1PDiagnostic IN1P data LSB nibble register0x02GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN1P
0x60DIAG_MON_MSB_IN1MDiagnostic IN1M data MSB byte register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN1M
0x61DIAG_MON_LSB_IN1MDiagnostic IN1M data LSB nibble register0x03GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN1M
0x62DIAG_MON_MSB_IN2PDiagnostic IN2P data MSB byte register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN2P
0x63DIAG_MON_LSB_IN2PDiagnostic IN2P data LSB nibble register0x04GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN2P
0x64DIAG_MON_MSB_IN2MDiagnostic IN2M data MSB byte register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN2M
0x65DIAG_MON_LSB_IN2MDiagnostic IN2M data LSB nibble register0x05GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN2M
0x66DIAG_MON_MSB_IN3PDiagnostic IN3P data MSB byte register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN3P
0x67DIAG_MON_LSB_IN3PDiagnostic IN3P data LSB nibble register0x06GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN3P
0x68DIAG_MON_MSB_IN3MDiagnostic IN3M data MSB byte register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN3M
0x69DIAG_MON_LSB_IN3MDiagnostic IN3M data LSB nibble register0x07GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN3M
0x6ADIAG_MON_MSB_IN4PDiagnostic IN4P data MSB byte register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN4P
0x6BDIAG_MON_LSB_IN4PDiagnostic IN4P data LSB nibble register0x08GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN4P
0x6CDIAG_MON_MSB_IN4MDiagnostic IN4M data MSB byte register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN4M
0x6DDIAG_MON_LSB_IN4MDiagnostic IN4M data LSB nibble register0x09GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN4M
0x76DIAG_MON_MSB_TEMPDiagnostic temperature data MSB byte register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_TEMP
0x77DIAG_MON_LSB_TEMPDiagnostic temperature data LSB nibble register0x0EGUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_TEMP
0x78DIAG_MON_MSB_LOADDiagnostic MICBIAS load current data MSB byte register0x00GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_LOAD
0x79DIAG_MON_LSB_LOADDiagnostic MICBIAS load current data LSB nibble register0x0FGUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_LOAD
0x7EREV_IDSilicon revision ID register0x20GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_REV_ID

6.1.3.1 PAGE_CFG Register (Address = 0x0) [Reset = 0x0]

PAGE_CFG is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_PAGE_CFG_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_PAGE_CFG_TABLE.

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The device memory map is divided into pages. This register sets the page.

Figure 8-173 PAGE_CFG Register
76543210
PAGE[7:0]
R/W-00000000b
Table 8-150 PAGE_CFG Register Field Descriptions
BitFieldTypeResetDescription
7-0PAGE[7:0]R/W00000000bThese bits set the device page.
0d = Page 0
1d = Page 1
…
255d = Page 255

6.1.3.2 MBIAS_LOAD Register (Address = 0x16) [Reset = 0x0]

MBIAS_LOAD is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_MBIAS_LOAD_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_MBIAS_LOAD_TABLE.

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This register is the MICBIAS internal load sink configuration register.

Figure 8-174 MBIAS_LOAD Register
76543210
MICBIAS_INT_LOAD_SINK_ENMICBIAS_INT_LOAD_SINK_VAL[2:0]RESERVED
R/W-0bR/W-000bR-0000b
Table 8-151 MBIAS_LOAD Register Field Descriptions
BitFieldTypeResetDescription
7MICBIAS_INT_LOAD_SINK_ENR/W0bMICBIAS internal load sink setting.
0d = MICBIAS internal load sink is enabled with setting automatically calculated based on device configuration
1d = MICBIAS internal load sink is enabled based on D6-4 register bits; This setting must be used for single-ended AC-coupled input to support high signal swing
6-4MICBIAS_INT_LOAD_SINK_VAL[2:0]R/W000bMICBIAS internal load sink current value.
0d = MICBIAS internal load sink current is set to 0 mA (typ)
1d = MICBIAS internal load sink current is set to 4.3 mA (typ)
2d = MICBIAS internal load sink current is set to 8.6 mA (typ)
3d = MICBIAS internal load sink current is set to 12.9 mA (typ)
4d = MICBIAS internal load sink current is set to 17.2 mA (typ)
5d = MICBIAS internal load sink current is set to 21.5 mA (typ)
6d = MICBIAS internal load sink current is set to 25.8 mA (typ)
7d = MICBIAS internal load sink current is set to 30.1 mA (typ)
3-0RESERVEDR0000bReserved bits; Write only reset values

6.1.3.3 INT_LIVE0 Register (Address = 0x2C) [Reset = 0x0]

INT_LIVE0 is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_INT_LIVE0_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_INT_LIVE0_TABLE.

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This register is the live Interrupt readback register 0.

Figure 8-175 INT_LIVE0 Register
76543210
INT_LIVE0INT_LIVE0INT_LIVE0INT_LIVE0RESERVEDRESERVEDRESERVEDRESERVED
R-0bR-0bR-0bR-0bR-0bR-0bR-0bR-0b
Table 8-152 INT_LIVE0 Register Field Descriptions
BitFieldTypeResetDescription
7INT_LIVE0R0bFault status for an ASI bus clock error.
0d = No fault detected
1d = Fault detected
6INT_LIVE0R0bStatus of PLL lock.
0d = No PLL lock detected
1d = PLL lock detected
5INT_LIVE0R0bFault status for boost or MICBIAS over temperature.
0d = No fault detected
1d = Fault detected
4INT_LIVE0R0bFault status for boost or MICBIAS over current.
0d = No fault detected
1d = Fault detected
3RESERVEDR0bReserved bit; Write only reset value
2RESERVEDR0bReserved bit; Write only reset value
1RESERVEDR0bReserved bit; Write only reset value
0RESERVEDR0bReserved bit; Write only reset value

6.1.3.4 CHx_LIVE Register (Address = 0x2D) [Reset = 0x0]

CHx_LIVE is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CHX_LIVE_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CHX_LIVE_TABLE.

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This register is the live Interrupt status register for channel level diagnostic summary.

Figure 8-176 CHx_LIVE Register
76543210
STS_CHx_LIVESTS_CHx_LIVESTS_CHx_LIVESTS_CHx_LIVERESERVEDRESERVEDSTS_CHx_LIVERESERVED
R-0bR-0bR-0bR-0bR-0bR-0bR-0bR-0b
Table 8-153 CHx_LIVE Register Field Descriptions
BitFieldTypeResetDescription
7STS_CHx_LIVER0bStatus of CH1_LIVE.
0d = No faults occurred in channel 1
1d = Atleast a fault has occurred in channel 1
6STS_CHx_LIVER0bStatus of CH2_LIVE.
0d = No faults occurred in channel 2
1d = Atleast a fault has occurred in channel 2
5STS_CHx_LIVER0bStatus of CH3_LIVE.
0d = No faults occurred in channel 3
1d = Atleast a fault has occurred in channel 3
4STS_CHx_LIVER0bStatus of CH4_LIVE.
0d = No faults occurred in channel 4
1d = Atleast a fault has occurred in channel 4
3RESERVEDR0bReserved bit; Write only reset value
2RESERVEDR0bReserved bit; Write only reset value
1STS_CHx_LIVER0bStatus of short to VBAT_IN fault detected when VBAT_IN is less than MICBIAS.
0d = Short to VBAT_IN fault when VBAT_IN is less than MICBIAS has not occurred in any channel
1d = Short to VBAT_IN fault when VBAT_IN is less than MICBIAS has occurred in atleast one channel
0RESERVEDR0bReserved bit; Write only reset value

6.1.3.5 CH1_LIVE Register (Address = 0x2E) [Reset = 0x0]

CH1_LIVE is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CH1_LIVE_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CH1_LIVE_TABLE.

Return to the Summary Table.

This register is the live Interrupt status register for channel 1 fault diagnostic

Figure 8-177 CH1_LIVE Register
76543210
CH1_LIVECH1_LIVECH1_LIVECH1_LIVECH1_LIVECH1_LIVECH1_LIVECH1_LIVE
R-0bR-0bR-0bR-0bR-0bR-0bR-0bR-0b
Table 8-154 CH1_LIVE Register Field Descriptions
BitFieldTypeResetDescription
7CH1_LIVER0bChannel 1 open input fault status.
0d = No open input detected
1d = Open input detected
6CH1_LIVER0bChannel 1 input pair short fault status.
0d = No input pair short detected
1d = Input short to each other detected
5CH1_LIVER0bChannel 1 IN1P short to ground fault status.
0d = IN1P no short to ground detected
1d = IN1P short to ground detected
4CH1_LIVER0bChannel 1 IN1M short to ground fault status.
0d = IN1M no short to ground detected
1d = IN1M short to ground detected
3CH1_LIVER0bChannel 1 IN1P short to MICBIAS fault status.
0d = IN1P no short to MICBIAS detected
1d = IN1P short to MICBIAS detected
2CH1_LIVER0bChannel 1 IN1M short to MICBIAS fault status.
0d = IN1M no short to MICBIAS detected
1d = IN1M short to MICBIAS detected
1CH1_LIVER0bChannel 1 IN1P short to VBAT_IN fault status.
0d = IN1P no short to VBAT_IN detected
1d = IN1P short to VBAT_IN detected
0CH1_LIVER0bChannel 1 IN1M short to VBAT_IN fault status.
0d = IN1M no short to VBAT_IN detected
1d = IN1M short to VBAT_IN detected

6.1.3.6 CH2_LIVE Register (Address = 0x2F) [Reset = 0x0]

CH2_LIVE is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CH2_LIVE_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CH2_LIVE_TABLE.

Return to the Summary Table.

This register is the live Interrupt status register for channel 2 fault diagnostic.

Figure 8-178 CH2_LIVE Register
76543210
CH2_LIVECH2_LIVECH2_LIVECH2_LIVECH2_LIVECH2_LIVECH2_LIVECH2_LIVE
R-0bR-0bR-0bR-0bR-0bR-0bR-0bR-0b
Table 8-155 CH2_LIVE Register Field Descriptions
BitFieldTypeResetDescription
7CH2_LIVER0bChannel 2 open input fault status.
0d = No open input detected
1d = Open input detected
6CH2_LIVER0bChannel 2 input pair short fault status.
0d = No input pair short detected
1d = Input short to each other detected
5CH2_LIVER0bChannel 2 IN2P short to ground fault status.
0d = IN2P no short to ground detected
1d = IN2P short to ground detected
4CH2_LIVER0bChannel 2 IN2M short to ground fault status.
0d = IN2M no short to ground detected
1d = IN2M short to ground detected
3CH2_LIVER0bChannel 2 IN2P short to MICBIAS fault status.
0d = IN2P no short to MICBIAS detected
1d = IN2P short to MICBIAS detected
2CH2_LIVER0bChannel 2 IN2M short to MICBIAS fault status.
0d = IN2M no short to MICBIAS detected
1d = IN2M short to MICBIAS detected
1CH2_LIVER0bChannel 2 IN2P short to VBAT_IN fault status.
0d = IN2P no short to VBAT_IN detected
1d = IN2P short to VBAT_IN detected
0CH2_LIVER0bChannel 2 IN2M short to VBAT_IN fault status.
0d = IN2M no short to VBAT_IN detected
1d = IN2M short to VBAT_IN detected

6.1.3.7 CH3_LIVE Register (Address = 0x30) [Reset = 0x0]

CH3_LIVE is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CH3_LIVE_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CH3_LIVE_TABLE.

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This register is the live Interrupt status register for channel3 fault diagnostic

Figure 8-179 CH3_LIVE Register
76543210
CH3_LIVECH3_LIVECH3_LIVECH3_LIVECH3_LIVECH3_LIVECH3_LIVECH3_LIVE
R-0bR-0bR-0bR-0bR-0bR-0bR-0bR-0b
Table 8-156 CH3_LIVE Register Field Descriptions
BitFieldTypeResetDescription
7CH3_LIVER0bChannel 3 open input fault status.
0d = No open input detected
1d = Open input detected
6CH3_LIVER0bChannel 3 input pair short fault status.
0d = No input pair short detected
1d = Input short to each other detected
5CH3_LIVER0bChannel 3 IN3P short to ground fault status.
0d = IN3P no short to ground detected
1d = IN3P short to ground detected
4CH3_LIVER0bChannel 3 IN3M short to ground fault status.
0d = IN3M no short to ground detected
1d = IN3M short to ground detected
3CH3_LIVER0bChannel 3 IN3P short to MICBIAS fault status.
0d = IN3P no short to MICBIAS detected
1d = IN3P short to MICBIAS detected
2CH3_LIVER0bChannel 3 IN3M short to MICBIAS fault status.
0d = IN3M no short to MICBIAS detected
1d = IN3M short to MICBIAS detected
1CH3_LIVER0bChannel 3 IN3P short to VBAT_IN fault status.
0d = IN3P no short to VBAT_IN detected
1d = IN3P short to VBAT_IN detected
0CH3_LIVER0bChannel 3 IN3M short to VBAT_IN fault status.
0d = IN3M no short to VBAT_IN detected
1d = IN3M short to VBAT_IN detected

6.1.3.8 CH4_LIVE Register (Address = 0x31) [Reset = 0x0]

CH4_LIVE is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CH4_LIVE_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_CH4_LIVE_TABLE.

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This register is the live Interrupt status register for channel 4 fault diagnostic.

Figure 8-180 CH4_LIVE Register
76543210
CH4_LIVECH4_LIVECH4_LIVECH4_LIVECH4_LIVECH4_LIVECH4_LIVECH4_LIVE
R-0bR-0bR-0bR-0bR-0bR-0bR-0bR-0b
Table 8-157 CH4_LIVE Register Field Descriptions
BitFieldTypeResetDescription
7CH4_LIVER0bChannel 4 open input fault status.
0d = No open input detected
1d = Open input detected
6CH4_LIVER0bChannel 4 input pair short fault status.
0d = No input pair short detected
1d = Input short to each other detected
5CH4_LIVER0bChannel 4 IN4P short to ground fault status.
0d = IN4P no short to ground detected
1d = IN4P short to ground detected
4CH4_LIVER0bChannel 4 IN4M short to ground fault status.
0d = IN4M no short to ground detected
1d = IN4M short to ground detected
3CH4_LIVER0bChannel 4 IN4P short to MICBIAS fault status.
0d = IN4P no short to MICBIAS detected
1d = IN4P short to MICBIAS detected
2CH4_LIVER0bChannel 4 IN4M short to MICBIAS fault status.
0d = IN4M no short to MICBIAS detected
1d = IN4M short to MICBIAS detected
1CH4_LIVER0bChannel 4 IN4P short to VBAT_IN fault status.
0d = IN4P no short to VBAT_IN detected
1d = IN4P short to VBAT_IN detected
0CH4_LIVER0bChannel 4 IN4M short to VBAT_IN fault status.
0d = IN4M no short to VBAT_IN detected
1d = IN4M short to VBAT_IN detected

6.1.3.9 INT_LIVE1 Register (Address = 0x35) [Reset = 0x0]

INT_LIVE1 is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_INT_LIVE1_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_INT_LIVE1_TABLE.

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This register is the live Interrupt readback register 1.

Figure 8-181 INT_LIVE1 Register
76543210
INT_LIVE1INT_LIVE1INT_LIVE1INT_LIVE1RESERVEDRESERVEDRESERVED
R-0bR-0bR-0bR-0bR-0bR-0bR-00b
Table 8-158 INT_LIVE1 Register Field Descriptions
BitFieldTypeResetDescription
7INT_LIVE1R0bChannel 1 IN1P over voltage fault status.
0d = No IN1P over voltage fault detected
1d = IN1P over voltage fault has detected
6INT_LIVE1R0bChannel 2 IN2P over voltage fault status.
0d = No IN2P over voltage fault detected
1d = IN2P over voltage fault has detected
5INT_LIVE1R0bChannel 3 IN3P over voltage fault status.
0d = No IN3P over voltage fault detected
1d = IN3P over voltage fault has detected
4INT_LIVE1R0bChannel 4 IN4P over voltage fault status.
0d = No IN4P over voltage fault detected
1d = IN4P over voltage fault has detected
3RESERVEDR0bReserved bit; Write only reset value
2RESERVEDR0bReserved bit; Write only reset value
1-0RESERVEDR00bReserved bits; Write only reset value

6.1.3.10 INT_LIVE3 Register (Address = 0x37) [Reset = 0x0]

INT_LIVE3 is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_INT_LIVE3_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_INT_LIVE3_TABLE.

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This register is the live Interrupt readback register 3.

Figure 8-182 INT_LIVE3 Register
76543210
INT_LIVE3INT_LIVE3INT_LIVE3RESERVED
R-0bR-0bR-0bR-00000b
Table 8-159 INT_LIVE3 Register Field Descriptions
BitFieldTypeResetDescription
7INT_LIVE3R0bFault status for MICBIAS high current.
0d = No fault detected
1d = Fault detected
6INT_LIVE3R0bFault status for MICBIAS low current.
0d = No fault detected
1d = Fault detected
5INT_LIVE3R0bFault status for MICBIAS over voltage.
0d = No fault detected
1d = Fault detected
4-0RESERVEDR00000bReserved bits; Write only reset value

6.1.3.11 MBIAS_OV_CFG Register (Address = 0x55) [Reset = 0x40]

MBIAS_OV_CFG is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_MBIAS_OV_CFG_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_MBIAS_OV_CFG_TABLE.

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This register is the MICBIAS overvoltage configuration register.

Figure 8-183 MBIAS_OV_CFG Register
76543210
MBIAS_OV_THRES[2:0]RESERVED
R/W-010bR-00000b
Table 8-160 MBIAS_OV_CFG Register Field Descriptions
BitFieldTypeResetDescription
7-5MBIAS_OV_THRES[2:0]R/W010bMICBIAS overvoltage fault detection threshold above MICBIAS programmed voltage.
0d = No threshold over programmed voltage
1d = 10mV (typ) threshold over programmed voltage
2d = 40mV (typ) threshold over programmed voltage (default)
3d to 6d = Threshold value is set as per configuration with step size of 30mV (typ)
7d = 190mV (typ) threshold over programmed voltage (default)
4-0RESERVEDR00000bReserved bits; Write only reset value

6.1.3.12 DIAGDATA_CFG Register (Address = 0x59) [Reset = 0x0]

DIAGDATA_CFG is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAGDATA_CFG_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAGDATA_CFG_TABLE.

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This register is the diagnostic data configuration register.

Figure 8-184 DIAGDATA_CFG Register
76543210
RESERVEDRESERVEDHOLD_SAR_DATA
R/W-0000bR-000bR/W-0b
Table 8-161 DIAGDATA_CFG Register Field Descriptions
BitFieldTypeResetDescription
7-4RESERVEDR/W0000bReserved bits; Write only reset values
3-1RESERVEDR000bReserved bits; Write only reset values
0HOLD_SAR_DATAR/W0bHold SAR data update during register readback.
0d = Data update is not held, data register is continuously updated; this setting must be used when moving average is enabled for fault detection
1d = Data update is held, data register readback can be done

6.1.3.13 DIAG_MON_MSB_VBAT Register (Address = 0x5A) [Reset = 0x0]

DIAG_MON_MSB_VBAT is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_VBAT_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_VBAT_TABLE.

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This register is the MSB data byte of VBAT_IN monitoring.

Figure 8-185 DIAG_MON_MSB_VBAT Register
76543210
DIAG_MON_MSB_VBAT[7:0]
R-00000000b
Table 8-162 DIAG_MON_MSB_VBAT Register Field Descriptions
BitFieldTypeResetDescription
7-0DIAG_MON_MSB_VBAT[7:0]R00000000bDiagnostic SAR monitor data MSB byte.

6.1.3.14 DIAG_MON_LSB_VBAT Register (Address = 0x5B) [Reset = 0x0]

DIAG_MON_LSB_VBAT is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_VBAT_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_VBAT_TABLE.

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This register is the LSB data nibble of VBAT_IN monitoring.

Figure 8-186 DIAG_MON_LSB_VBAT Register
76543210
DIAG_MON_LSB_VBAT[3:0]CHANNEL_ID[3:0]
R-0000bR-0000b
Table 8-163 DIAG_MON_LSB_VBAT Register Field Descriptions
BitFieldTypeResetDescription
7-4DIAG_MON_LSB_VBAT[3:0]R0000bDiagnostic SAR monitor data LSB nibble.
3-0CHANNEL_ID[3:0]R0000bChannel ID value.

6.1.3.15 DIAG_MON_MSB_MBIAS Register (Address = 0x5C) [Reset = 0x0]

DIAG_MON_MSB_MBIAS is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_MBIAS_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_MBIAS_TABLE.

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This register is the MSB data byte of MICBIAS monitoring.

Figure 8-187 DIAG_MON_MSB_MBIAS Register
76543210
DIAG_MON_MSB_MBIAS[7:0]
R-00000000b
Table 8-164 DIAG_MON_MSB_MBIAS Register Field Descriptions
BitFieldTypeResetDescription
7-0DIAG_MON_MSB_MBIAS[7:0]R00000000bDiagnostic SAR monitor data MSB byte.

6.1.3.16 DIAG_MON_LSB_MBIAS Register (Address = 0x5D) [Reset = 0x1]

DIAG_MON_LSB_MBIAS is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_MBIAS_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_MBIAS_TABLE.

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This register is the LSB data nibble of MICBIAS monitoring.

Figure 8-188 DIAG_MON_LSB_MBIAS Register
76543210
DIAG_MON_LSB_MBIAS[3:0]CHANNEL_ID[3:0]
R-0000bR-0001b
Table 8-165 DIAG_MON_LSB_MBIAS Register Field Descriptions
BitFieldTypeResetDescription
7-4DIAG_MON_LSB_MBIAS[3:0]R0000bDiagnostic SAR monitor data LSB nibble.
3-0CHANNEL_ID[3:0]R0001bChannel ID value.

6.1.3.17 DIAG_MON_MSB_IN1P Register (Address = 0x5E) [Reset = 0x0]

DIAG_MON_MSB_IN1P is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN1P_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN1P_TABLE.

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This register is the MSB data byte of IN1P monitoring.

Figure 8-189 DIAG_MON_MSB_IN1P Register
76543210
DIAG_MON_MSB_CH1P[7:0]
R-00000000b
Table 8-166 DIAG_MON_MSB_IN1P Register Field Descriptions
BitFieldTypeResetDescription
7-0DIAG_MON_MSB_CH1P[7:0]R00000000bDiagnostic SAR monitor data MSB byte.

6.1.3.18 DIAG_MON_LSB_IN1P Register (Address = 0x5F) [Reset = 0x2]

DIAG_MON_LSB_IN1P is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN1P_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN1P_TABLE.

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This register is the LSB data nibble of IN1P monitoring.

Figure 8-190 DIAG_MON_LSB_IN1P Register
76543210
DIAG_MON_LSB_CH1P[3:0]CHANNEL_ID[3:0]
R-0000bR-0010b
Table 8-167 DIAG_MON_LSB_IN1P Register Field Descriptions
BitFieldTypeResetDescription
7-4DIAG_MON_LSB_CH1P[3:0]R0000bDiagnostic SAR monitor data LSB nibble.
3-0CHANNEL_ID[3:0]R0010bChannel ID value.

6.1.3.19 DIAG_MON_MSB_IN1M Register (Address = 0x60) [Reset = 0x0]

DIAG_MON_MSB_IN1M is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN1M_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN1M_TABLE.

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This register is the MSB data byte of IN1M monitoring.

Figure 8-191 DIAG_MON_MSB_IN1M Register
76543210
DIAG_MON_MSB_CH1N[7:0]
R-00000000b
Table 8-168 DIAG_MON_MSB_IN1M Register Field Descriptions
BitFieldTypeResetDescription
7-0DIAG_MON_MSB_CH1N[7:0]R00000000bDiagnostic SAR monitor data MSB byte.

6.1.3.20 DIAG_MON_LSB_IN1M Register (Address = 0x61) [Reset = 0x3]

DIAG_MON_LSB_IN1M is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN1M_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN1M_TABLE.

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This register is the LSB data nibble of IN1M monitoring.

Figure 8-192 DIAG_MON_LSB_IN1M Register
76543210
DIAG_MON_LSB_CH1N[3:0]CHANNEL_ID[3:0]
R-0000bR-0011b
Table 8-169 DIAG_MON_LSB_IN1M Register Field Descriptions
BitFieldTypeResetDescription
7-4DIAG_MON_LSB_CH1N[3:0]R0000bDiagnostic SAR monitor data LSB nibble.
3-0CHANNEL_ID[3:0]R0011bChannel ID value.

6.1.3.21 DIAG_MON_MSB_IN2P Register (Address = 0x62) [Reset = 0x0]

DIAG_MON_MSB_IN2P is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN2P_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN2P_TABLE.

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This register is the MSB data byte of IN2P monitoring.

Figure 8-193 DIAG_MON_MSB_IN2P Register
76543210
DIAG_MON_MSB_CH2P[7:0]
R-00000000b
Table 8-170 DIAG_MON_MSB_IN2P Register Field Descriptions
BitFieldTypeResetDescription
7-0DIAG_MON_MSB_CH2P[7:0]R00000000bDiagnostic SAR monitor data MSB byte.

6.1.3.22 DIAG_MON_LSB_IN2P Register (Address = 0x63) [Reset = 0x4]

DIAG_MON_LSB_IN2P is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN2P_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN2P_TABLE.

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This register is the LSB data nibble of IN2P monitoring.

Figure 8-194 DIAG_MON_LSB_IN2P Register
76543210
DIAG_MON_LSB_CH2P[3:0]CHANNEL_ID[3:0]
R-0000bR-0100b
Table 8-171 DIAG_MON_LSB_IN2P Register Field Descriptions
BitFieldTypeResetDescription
7-4DIAG_MON_LSB_CH2P[3:0]R0000bDiagnostic SAR monitor data LSB nibble.
3-0CHANNEL_ID[3:0]R0100bChannel ID value.

6.1.3.23 DIAG_MON_MSB_IN2M Register (Address = 0x64) [Reset = 0x0]

DIAG_MON_MSB_IN2M is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN2M_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN2M_TABLE.

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This register is the MSB data byte of IN2M monitoring.

Figure 8-195 DIAG_MON_MSB_IN2M Register
76543210
DIAG_MON_MSB_CH2N[7:0]
R-00000000b
Table 8-172 DIAG_MON_MSB_IN2M Register Field Descriptions
BitFieldTypeResetDescription
7-0DIAG_MON_MSB_CH2N[7:0]R00000000bDiagnostic SAR monitor data MSB byte.

6.1.3.24 DIAG_MON_LSB_IN2M Register (Address = 0x65) [Reset = 0x5]

DIAG_MON_LSB_IN2M is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN2M_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN2M_TABLE.

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This register is the LSB data nibble of IN2M monitoring.

Figure 8-196 DIAG_MON_LSB_IN2M Register
76543210
DIAG_MON_LSB_CH2N[3:0]CHANNEL_ID[3:0]
R-0000bR-0101b
Table 8-173 DIAG_MON_LSB_IN2M Register Field Descriptions
BitFieldTypeResetDescription
7-4DIAG_MON_LSB_CH2N[3:0]R0000bDiagnostic SAR monitor data LSB nibble.
3-0CHANNEL_ID[3:0]R0101bChannel ID value.

6.1.3.25 DIAG_MON_MSB_IN3P Register (Address = 0x66) [Reset = 0x0]

DIAG_MON_MSB_IN3P is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN3P_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN3P_TABLE.

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This register is the MSB data byte of IN3P monitoring.

Figure 8-197 DIAG_MON_MSB_IN3P Register
76543210
DIAG_MON_MSB_CH3P[7:0]
R-00000000b
Table 8-174 DIAG_MON_MSB_IN3P Register Field Descriptions
BitFieldTypeResetDescription
7-0DIAG_MON_MSB_CH3P[7:0]R00000000bDiagnostic SAR monitor data MSB byte.

6.1.3.26 DIAG_MON_LSB_IN3P Register (Address = 0x67) [Reset = 0x6]

DIAG_MON_LSB_IN3P is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN3P_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN3P_TABLE.

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This register is the LSB data nibble of IN3P monitoring.

Figure 8-198 DIAG_MON_LSB_IN3P Register
76543210
DIAG_MON_LSB_CH3P[3:0]CHANNEL_ID[3:0]
R-0000bR-0110b
Table 8-175 DIAG_MON_LSB_IN3P Register Field Descriptions
BitFieldTypeResetDescription
7-4DIAG_MON_LSB_CH3P[3:0]R0000bDiagnostic SAR monitor data LSB nibble.
3-0CHANNEL_ID[3:0]R0110bChannel ID value.

6.1.3.27 DIAG_MON_MSB_IN3M Register (Address = 0x68) [Reset = 0x0]

DIAG_MON_MSB_IN3M is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN3M_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN3M_TABLE.

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This register is the MSB data byte of IN3M monitoring.

Figure 8-199 DIAG_MON_MSB_IN3M Register
76543210
DIAG_MON_MSB_CH3N[7:0]
R-00000000b
Table 8-176 DIAG_MON_MSB_IN3M Register Field Descriptions
BitFieldTypeResetDescription
7-0DIAG_MON_MSB_CH3N[7:0]R00000000bDiagnostic SAR monitor data MSB byte.

6.1.3.28 DIAG_MON_LSB_IN3M Register (Address = 0x69) [Reset = 0x7]

DIAG_MON_LSB_IN3M is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN3M_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN3M_TABLE.

Return to the Summary Table.

This register is the LSB data nibble of IN3M monitoring.

Figure 8-200 DIAG_MON_LSB_IN3M Register
76543210
DIAG_MON_LSB_CH3N[3:0]CHANNEL_ID[3:0]
R-0000bR-0111b
Table 8-177 DIAG_MON_LSB_IN3M Register Field Descriptions
BitFieldTypeResetDescription
7-4DIAG_MON_LSB_CH3N[3:0]R0000bDiagnostic SAR monitor data LSB nibble.
3-0CHANNEL_ID[3:0]R0111bChannel ID value.

6.1.3.29 DIAG_MON_MSB_IN4P Register (Address = 0x6A) [Reset = 0x0]

DIAG_MON_MSB_IN4P is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN4P_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN4P_TABLE.

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This register is the MSB data byte of IN4P monitoring.

Figure 8-201 DIAG_MON_MSB_IN4P Register
76543210
DIAG_MON_MSB_CH4P[7:0]
R-00000000b
Table 8-178 DIAG_MON_MSB_IN4P Register Field Descriptions
BitFieldTypeResetDescription
7-0DIAG_MON_MSB_CH4P[7:0]R00000000bDiagnostic SAR monitor data MSB byte.

6.1.3.30 DIAG_MON_LSB_IN4P Register (Address = 0x6B) [Reset = 0x8]

DIAG_MON_LSB_IN4P is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN4P_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN4P_TABLE.

Return to the Summary Table.

This register is the LSB data nibble of IN4P monitoring.

Figure 8-202 DIAG_MON_LSB_IN4P Register
76543210
DIAG_MON_LSB_CH4P[3:0]CHANNEL_ID[3:0]
R-0000bR-1000b
Table 8-179 DIAG_MON_LSB_IN4P Register Field Descriptions
BitFieldTypeResetDescription
7-4DIAG_MON_LSB_CH4P[3:0]R0000bDiagnostic SAR monitor data LSB nibble.
3-0CHANNEL_ID[3:0]R1000bChannel ID value.

6.1.3.31 DIAG_MON_MSB_IN4M Register (Address = 0x6C) [Reset = 0x0]

DIAG_MON_MSB_IN4M is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN4M_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_IN4M_TABLE.

Return to the Summary Table.

This register is the MSB data byte of IN4M monitoring.

Figure 8-203 DIAG_MON_MSB_IN4M Register
76543210
DIAG_MON_MSB_CH4N[7:0]
R-00000000b
Table 8-180 DIAG_MON_MSB_IN4M Register Field Descriptions
BitFieldTypeResetDescription
7-0DIAG_MON_MSB_CH4N[7:0]R00000000bDiagnostic SAR monitor data MSB byte.

6.1.3.32 DIAG_MON_LSB_IN4M Register (Address = 0x6D) [Reset = 0x9]

DIAG_MON_LSB_IN4M is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN4M_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_IN4M_TABLE.

Return to the Summary Table.

This register is the LSB data nibble of IN4M monitoring.

Figure 8-204 DIAG_MON_LSB_IN4M Register
76543210
DIAG_MON_LSB_CH4N[3:0]CHANNEL_ID[3:0]
R-0000bR-1001b
Table 8-181 DIAG_MON_LSB_IN4M Register Field Descriptions
BitFieldTypeResetDescription
7-4DIAG_MON_LSB_CH4N[3:0]R0000bDiagnostic SAR monitor data LSB nibble.
3-0CHANNEL_ID[3:0]R1001bChannel ID value.

6.1.3.33 DIAG_MON_MSB_TEMP Register (Address = 0x76) [Reset = 0x0]

DIAG_MON_MSB_TEMP is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_TEMP_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_TEMP_TABLE.

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This register is the MSB data byte of temperature monitoring.

Figure 8-205 DIAG_MON_MSB_TEMP Register
76543210
DIAG_MON_MSB_TEMP[7:0]
R-00000000b
Table 8-182 DIAG_MON_MSB_TEMP Register Field Descriptions
BitFieldTypeResetDescription
7-0DIAG_MON_MSB_TEMP[7:0]R00000000bDiagnostic SAR monitor data MSB byte.

6.1.3.34 DIAG_MON_LSB_TEMP Register (Address = 0x77) [Reset = 0xE]

DIAG_MON_LSB_TEMP is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_TEMP_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_TEMP_TABLE.

Return to the Summary Table.

This register is the LSB data nibble of temperature monitoring.

Figure 8-206 DIAG_MON_LSB_TEMP Register
76543210
DIAG_MON_LSB_TEMP[3:0]CHANNEL_ID[3:0]
R-0000bR-1110b
Table 8-183 DIAG_MON_LSB_TEMP Register Field Descriptions
BitFieldTypeResetDescription
7-4DIAG_MON_LSB_TEMP[3:0]R0000bDiagnostic SAR monitor data LSB nibble.
3-0CHANNEL_ID[3:0]R1110bChannel ID value.

6.1.3.35 DIAG_MON_MSB_LOAD Register (Address = 0x78) [Reset = 0x0]

DIAG_MON_MSB_LOAD is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_LOAD_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_MSB_LOAD_TABLE.

Return to the Summary Table.

This register is the MSB data byte of MICBIAS load current monitoring.

Figure 8-207 DIAG_MON_MSB_LOAD Register
76543210
DIAG_MON_MSB_LOAD[7:0]
R-00000000b
Table 8-184 DIAG_MON_MSB_LOAD Register Field Descriptions
BitFieldTypeResetDescription
7-0DIAG_MON_MSB_LOAD[7:0]R00000000bDiagnostic SAR monitor data MSB byte.

6.1.3.36 DIAG_MON_LSB_LOAD Register (Address = 0x79) [Reset = 0xF]

DIAG_MON_LSB_LOAD is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_LOAD_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_DIAG_MON_LSB_LOAD_TABLE.

Return to the Summary Table.

This register is the LSB data nibble of MICBIAS load current monitoring.

Figure 8-208 DIAG_MON_LSB_LOAD Register
76543210
DIAG_MON_LSB_LOAD[3:0]CHANNEL_ID[3:0]
R-0000bR-1111b
Table 8-185 DIAG_MON_LSB_LOAD Register Field Descriptions
BitFieldTypeResetDescription
7-4DIAG_MON_LSB_LOAD[3:0]R0000bDiagnostic SAR monitor data LSB nibble.
3-0CHANNEL_ID[3:0]R1111bChannel ID value.

6.1.3.37 REV_ID Register (Address = 0x7E) [Reset = 0x20]

REV_ID is shown in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_REV_ID_FIGURE and described in GUID-20201210-SS0T-MQ3J-PTTD-MWJJH70MFW7D.html#PCM6480_PAGE_1_PAGE_1_REV_ID_TABLE.

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This register is the silicon revision ID register.

Figure 8-209 REV_ID Register
76543210
REV_ID[3:0]RESERVED
R-0010bR-0000b
Table 8-186 REV_ID Register Field Descriptions
BitFieldTypeResetDescription
7-4REV_ID[3:0]R0010bReturns the revision ID.
3-0RESERVEDR0000bReserved bits; Write only reset values