SCES469F August   2003  – March 2020 SN74LVC1404

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics, CL = 15 pF
    7. 7.7 Switching Characteristics, CL = 30 pF or 50 pF
    8. 7.8 Operating Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Testing
      3. 10.2.3 Application Curves
        1. 10.2.3.1 LVC1404 in 25-MHz Crystal-Oscillator Circuit
        2. 10.2.3.2 LVC1404 in 10-MHz Crystal-Oscillator Circuit
        3. 10.2.3.3 LVC1404 in 2-MHz Crystal-Oscillator Circuit
        4. 10.2.3.4 LVC1404 in 100-kHz Crystal-Oscillator Circuit
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DCU|8
  • YZP|8
  • DCT|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.1 Design Requirements

  • The open-loop gain of the unbuffered inverter decreases as power-supply voltage decreases. This decreases the closed-loop gain of the oscillator circuit. The value of Rs can be decreased to increase the closed-loop gain, while maintaining the power dissipation of the crystal within the maximum limit.
  • Rs and C2 form a low-pass filter and reduce spurious oscillations. Component values can be adjusted, based on the desired cutoff frequency.
  • C2 can be increased over C1 to increase the phase shift and help in start-up of the oscillator. Increasing C2 may affect the duty cycle of the output voltage.
  • At high frequency, phase shift due to Rs becomes significant. In this case, Rs can be replaced by a capacitor to reduce the phase shift.