SLLS550E November   2002  – March 2023 SN65HVD08 , SN75HVD08

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Driver Switching Characteristics
    7. 6.7 Receiver Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Supply Source Impedance
      2. 9.1.2 Opto-Isolated Data Buses
      3. 9.1.3 Opto Alternative
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
          1.        30
          2.        31
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Failsafe
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The SN65HVD08 combines a 3-state differential line driver and differential line receiver designed for balanced data transmission and interoperation with ANSI TIA/EIA-485-A and ISO-8482E standard-compliant devices.

The wide supply voltage range and low quiescent current requirements allow the SN65HVD08s to operate from a 5-V power bus in the cable with as much as a 2-V line voltage drop. Busing power in the cable can alleviate the need for isolated power to be generated at each connection of a ground-isolated bus.

The driver differential outputs and receiver differential inputs connect internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or not powered. The drivers and receivers have active-high and active-low enables respectively, which can be externally connected together to function as a direction control.

Package Information
PART NUMBERPACKAGE(1)BODY SIZE (NOM)
SN75HVD08,
SN65HVD08
SOIC (8)4.90 mm × 3.91 mm
PDIP (8)9.81 mm × 6.35 mm
For all available packages, see the orderable addendum at the end of the datasheet.
GUID-B089A2C8-B721-4D97-A4A2-272DEFAE69FB-low.gif Typical Application Schematic